JPS5852332B2 - Impurity diffusion method - Google Patents

Description

Detailed Description of the Invention In recent years, in order to improve production efficiency and reduce manufacturing costs of semiconductor integrated circuit devices, semiconductor manufacturing equipment has been improved and semiconductor substrates used in manufacturing lines have become larger. inch diameter, and a 4-inch diameter ratio for semiconductor substrates is about to be considered.

Conventionally, if the diameter of the semiconductor substrate was about 2 inches, the warping of the semiconductor substrate during the manufacturing process of semiconductor circuit devices was not noticeable, but as the diameter of the semiconductor substrate becomes larger as it is today, the warpage of the semiconductor substrate is caused by repeated diffusion treatments. Warpage cannot be ignored, and the gap created between the glass mask and the semiconductor substrate during the photolithography process significantly deteriorates pattern accuracy.

Further, warping of the semiconductor substrate causes distortion to the lattice structure inside the semiconductor, which deteriorates the characteristics due to variations in the current amplification factor of the semiconductor element, increases noise, etc., and is one of the causes of reduced product yield.

Especially in the production of bipolar semiconductor integrated circuit devices,
In the gold diffusion process, which is performed to improve the operating speed of devices, rapid cooling is performed from a processing temperature of 1000 to 1200°C to room temperature, similar to hardening iron, so that the gold diffused from the back surface of the semiconductor substrate does not precipitate on the back surface again during cooling. Therefore, the warpage of the semiconductor substrate becomes extremely noticeable.

Considering the case where silicon is used for the semiconductor substrate, the thermal expansion coefficient of silicon is 2.5 x 1O-60C'', and the thermal expansion coefficient of the thermal oxide film Sio2 is 0.35 x 10-'.
Since the temperature is approximately −1° C., when the semiconductor substrate is rapidly cooled, the shrinkage of silicon is greater than that of the S io 2 film, and it is thought that the semiconductor substrate is warped because this shrinkage strain remains.

June 3, 1975 as a conventional method for preventing warpage of semiconductor substrates
As described on pages 36 to 41 of the Nikkei Electronics magazine published on the 0th, a silicon nitride film 513N4 (thermal expansion coefficient 3.9 x 10") having almost the same coefficient of thermal expansion as the silicon substrate is placed on a silicon semiconductor substrate on which an S102 film is formed. 'C'
-1) is formed to an appropriate thickness, the silicon substrate and the 5i3N4 film with the Si02 film in between will shrink to the same extent, so that warping can be reduced.

However, this method has the disadvantage that the steps of depositing and etching the Si3N4 film are increased.

The present invention relates to an impurity diffusion method that does not increase the number of heat treatment steps in a semiconductor device and reduces the warpage of a semiconductor substrate as described above.

FIG. 1 is an embodiment of the present invention, and shows a gold diffusion process in which a semiconductor substrate undergoes a large temperature change due to rapid heating and cooling, in the production of bipolar integrated circuits.

A thermal oxide film 5 is formed on both sides of a silicon substrate 1 with a thickness of approximately 400μ.
1022 is formed to a thickness of about 0.5μ (FIG. 1a).

The S102 film 2 is selectively etched to form grid lines 3 for dividing the dice.

The grid lines 3 have the shape shown in FIG. 2, and this partial oxide film is completely removed.

Also, when forming the grid lines 3, S on the back surface of the silicon substrate 1 is
The s02 film is also removed at the same time (FIG. 1b).

Next, gold 4 is deposited on the entire back surface of the silicon substrate 1 as shown in FIG.
Gold diffusion is carried out by holding the treatment temperature at 0° C. for about 10 to 40 minutes (FIG. 1d).

To prevent the diffused gold from depositing on the silicon substrate surface again,
The silicon substrate is quickly removed from the diffusion furnace and rapidly cooled.

As shown in Figure 1, if the silicon oxide film on the grid lines between each die of the semiconductor substrate is completely removed before the gold diffusion process, the stress caused by the difference in expansion coefficient between the semiconductor substrate and the silicon oxide film during rapid cooling can be reduced between each die. Because it is absorbed within the
It is possible to prevent the influence of distortion of each die from being transmitted to the entire semiconductor substrate, and therefore it is possible to reduce warpage of the entire semiconductor substrate.

FIG. 3 shows the variation of the absolute value +41 in the amount of change in warpage of the silicon substrate when a gold diffusion process is performed using a silicon wafer with a diameter of 3 inches.

A shows the variation in warpage when the gold diffusion is made without removing the oxide film on the grid lines, and B shows the variation in warpage when the oxide film on the grid lines is removed before gold diffusion according to the present invention. When the method according to the present invention is implemented, the warpage of the substrate is improved to about 1/4 compared to the conventional method.

The present invention is extremely effective when implemented not only in the gold diffusion step in the embodiments, but also in processing steps that involve large thermal changes in the semiconductor device manufacturing process.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of the present invention, FIG. 2 shows a top view after removing an oxide film on the grid lines of a semiconductor substrate, and FIG. 3 shows the absolute value of the amount of change in warpage of the semiconductor substrate after heat treatment. 1... Silicon substrate, 2... Oxide film,
3... Grid line, 4... Gold vapor deposited film.

Claims (1)

[Scope of Claims] 1. A step of applying an oxide film to one surface of the semiconductor substrate, a step of removing the oxide film on the mesh-like grid lines on which the dice are to be divided by etching, and a step of etching the oxide film from the back surface of the semiconductor substrate. a step of attaching impurities to be diffused;
An impurity diffusion method comprising the steps of diffusing the impurity into the semiconductor substrate by performing heat treatment in a diffusion furnace, and taking out the semiconductor substrate from the diffusion furnace and rapidly cooling it. 2. The impurity diffusion method according to claim 1, wherein the semiconductor substrate is a silicon substrate. 3. The impurity diffusion method according to claim 1, wherein the impurity is gold.