JPS5844736A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To selectively oxidize a semiconductor substrate without pattern conversion difference by laminating SiO2, Si3N4 on the substrate, selectively oxidizing the superposed polysilicon with the SiO2 and Si3N4 as masks of two layers to form an SiO2 mask and etching and opening the lower layer. CONSTITUTION:SiO2 12, Si3N4 13, polysilicon 14, SiO2 15, Si3N4 are superposed on an Si substrate 1, a resist mask 17 of width W is coated, they are then plasme etched to form a film 16'. Then, a side etching alpha1 is produced. When the polysilicon 14 is converted to SiO2 18 via the mask 16', a bird beak beta1 is produced, and when the films 16, 15, 14' are etched by plasma and NH4F, a hole 19 is formed in size difference gamma1. When it is plasma etched via a mask 18 to form a film 13', a side etching alpha2 is produced, the film 18 is removed with NH4F, a hole is opened at the film 12, thereby forming an SiO2 20. When the films 13', 12 are then etched, the bird beak is retarded from beta2 by gamma2. When the thickness of the film and the wet oxidizing conditions are selected at alpha1=alpha2, beta1=beta2, then because gamma1, gamma2 are minute respectively, and the conversion difference can be entirely set to zero.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and relates to a selective oxidation method for forming a 4IK% element region.

The progress in miniaturization and high integration of semiconductor devices, especially in MO811 stIgl circuits, has been remarkable, and the selective oxidation method has played an extremely important role111 in this process due to its ability to obtain surfaces with excellent flatness. There's something big. However, the selective oxidation method has a property that the difference in conversion from the resist pattern to the finished pattern is relatively large, and this property is an obstacle to further miniaturization of devices. This can be explained as follows: A, v. The conventional selective oxidation method is carried out as follows. - After forming, a silicon nitride layer 3f is deposited on it by the CVD method, and a resist pattern 41 is formed on the pre-electrode area of the element region from a photoender 1p process (hereinafter referred to as PIF). (Illustrated in Collection 11).

Width VW of the opening in resist pattern 4 at this time
shall be.

(I Next, the silicon nitride film 3f is plasma etched as a resist pattern 4\r mask.
A silicon nitride film pattern 3' is formed (shown in the same figure).

Etching at this time inevitably involves side etching, and if the size of this side etching is α, then
The angle of the opening formed in the silicon nitride film pattern 3' is W+2α.

(Next, after removing the resist pattern 4f, a thick field oxidation layer 5t is formed by performing wet oxidation as a silicon nitride film pattern 3' as a mask (as shown in the same figure)) .

At this time, since oxygen also invades under the silicon nitride pattern 31, a PFIR bird's beak portion is formed in the field oxide film 5, which penetrates into the silicon nitride film pattern conversion difference. f) /(-The distance β of the leak portion and the width of the field oxide film 5 become W+2(α+β).

(Next, the silicon nitride film pattern 31 is removed by etching, and then the silicon oxide used as the wet oxidation θ buffer t is removed by etching to form a field. Form a region (same figure (to illustration)).

The etching at this time causes the bird's beak part of the field oxide film to recede a little, so what is the distance? S of the field oxide film 5 is w + 2 (α + β - r). In this way, in the conventional selective oxidation method, the openings of the resist pattern 4 and the field are oxidized. and v [2(
α+β-r) c> When a conversion difference occurs, the conversion difference will be about 1.5 μm, but assuming that the width of the mod resist pattern 4 and its opening is 3.0 μm. Also, - of the field oxide film 5 is 4.5 .mu.m, and II#A of the element region is 1.5 m.

Furthermore, the width of the four resist patterns and the width of the opening W
When both are formed with a thickness of 1.5 μm, field oxidation M
Therefore, even if there is a PgP technology that can form a fine resist pattern 4 with a width of 1.5 μm, this technology cannot be used in the selective oxidation method. It will not be possible to achieve miniaturization of the device. As a result, we found that it is possible to use conventional selective oxidation tubes up to the 3.0 μm rule.
When attempting to produce iron t*i below the 2.0 μm rule, there is a problem in that pattern conversion differences in conventional selective oxidation methods become a major obstacle.

The present invention has been made in view of the above-mentioned circumstances, and provides a method for manufacturing a semiconductor device that achieves further miniaturization of elements and an integrated circuit #tliL by a selective oxidation method with extremely small pattern conversion differences. be.

That is, #4Fi, a first oxide film, a first oxidation-resistant film, a polycrystalline semiconductor layer, and a polycrystalline semiconductor layer are sequentially formed on the raw material base of the #4 Fi, l-conducting temperature. @
2 oxide film and IF! forming the second oxidation-resistant membrane tubes, and patterning the second oxidation-resistant membrane tubes to form a second oxidation-resistant explosive-feeding membrane pattern having an opening on the intended element area. a step # of selectively converting the non-masked portion Y of the polycrystalline semiconductor layer into a thick oxide film by oxidizing the polycrystalline semiconductor layer as a second oxidation-resistant p-pattern tube mask; Oxidation-resistant film pattern and the above below! removing the 20 oxide film layer and further removing the polycrystalline semiconductor layer tube left under the second oxidation-resistant film pattern, and forming an opening surrounded by a thick oxide film; forming a first oxidation resistant film pattern by etching the first oxidation resistant film as the thick oxide film tube mask surrounding the opening rip;
Said thick mirror conversion? remove and sir lc 1st +Z
) removing the first oxide film in the portions not covered with the oxidation-resistant film pattern, and using the first oxidation-resistant insulating film pattern as a mask to reduce the thickness of the semiconductor substrate to 1 m. A step of selectively forming a thick field oxide #Is in the non-masked portion by forming the first oxidation-resistant insulating film pattern and the WG1 layer below it.
Oxidation of 11$1 [? This is a method for manufacturing a semiconductor device characterized by a removing step and equipment.

As the 1-type semiconductor substrate in the present invention, 87.
n-type or es consisting of semiconductor materials such as Ge, ()aAs, etc.
A TP type semiconductor substrate tube can be used.

The oxidized Ml in the present invention is used as a buffer film during selective trap oxidation of a semiconductor substrate and a polycrystalline semiconductor layer, and is a living body formed by thermally oxidizing the surfaces of the semiconductor substrate and polycrystalline semiconductor layer. A thermal oxide film of the material can be used.

For example, a silicon nitride film can be used as the llt oxidizing film in the present invention.Hereinafter, the selective oxidation method used in the VM manufacturing method of the present invention will be described. This will be explained with reference to Figure 2 (Xun).

(1) First, the silicon substrate 10 surface 1? thermal oxidation to form a first silicon oxide ll112;
II by method D! A silicon nitride film 13 of No. 1 is deposited.

Subsequently, a polycrystalline silicon layer 14 is deposited on the silicon nitride film 13 [by CVD method]. Then, after thermally oxidizing the surface of the polycrystalline silicon layer to release the second silicon oxide film 15f, a second silicon oxide film 15f is formed using the Kcvn method.
Next, a resist pattern 17 is formed on the area where the field oxide film is to be formed by PIF (FIG. 2 (FIG. 4)).

This and 1! ! 9 resist patterns 17telAk all.

(1=・1 Next, the 20th series is made threatening by selectively etching the 20th silicon nitride layer 16 as a mask for the 20th series.
To form 6'l (- figure (- figure shown).

If the magnitude of side etching accompanying etching at this time is α1, then - of the nitride film pattern 16' becomes w-2αl.

(-Next, after removing the resist pattern 17, selective wet oxidation of the polycrystalline silicon layer 15 is performed as a mask for the second silicon 9 film pattern 161, and thick silicon oxidation is performed on the non-masked portions of the polycrystalline silicon layer 15. f11
8 (as shown in the same figure (C)).

At this time, % is formed under the second silicon nitride film pattern 16'.
Thick silicon oxide #18 due to the intrusion of rIN
A Ku bird's beak is formed, resulting in the formation of a polycrystalline silicone layer 14' having a trapezoidal cross section. Letting the distance V of the bird's beak portion be β1, the top of the trapezoidal polycrystalline silicon layer 74' [-〇radius Hw-2 (α1+βl)]
becomes.

(After removing the silicon nitride pattern 161Y of the mackerel by vC1 plasma etching, the silicon face pattern 161Y used as a buffer during wet oxidation was removed by ammonium heptoxide solution, and then the pattern 161Y was removed by plasma etching. The crystalline silicon layer 14' is removed to form one hole 19 (as shown in FIG. 4(d)).

This hole portion 19 is a polycrystalline silicon layer 14' having a trapezoidal cross section.
Therefore, if the horizontal distance between the top -° part and the bottom end of the polycrystalline silicon layer 14' is f11, then the width of the bottom of the opening 19 is W-2. (
α凰Juβs−i,).

(-Next, the remaining thick silicon marking film 18??! By plasma etching the first silicon nitride film 1.3t as a star, the tenth silicon marking film pattern 13
'tubes are formed (- figure (-1 shown)).

The magnitude of the side etching Yra- which occurs at this time and the width of the opening in the silicon nitride film pattern 13' are W-2 (α + βt - rt - α).

(In M'eK, the silicon oxide fill &f etching is removed using ammonium fluoride solution. From this, the silicon nitride film pattern 1B' of the island l of the first silicon oxide!112 is not inspected. The etching portion is also removed at the same time (see figure 0).

M Next, the silicon 9ide film pattern 13 of IIpJl
1) A silicon base plate 11f is used as an oxidation-resistant mask to form a doped oxide ring 20f on the surface of the selectively etched oxidation tube (FIG. 1 (-)).

At this time, the distance l11rβ2 of the bird's beak portion that is formed by penetrating under the first silicon nitride film pattern 13'
According to the above, the width of the field oxide film 20 is W-2(α1+
β*−rt)+2(α1+βweight).

~・ Next, if! by 1 lasma etching. 112)
Remove the silicon nitride film pattern 1B'vr# and remove the silicon oxide film 1 from the ammonium fluoride film 1likK.
Field oxidation M is removed by etching two tubes.
9420 to form an element region separated by 9420 (I!
l! ! , l (showing groan (2)).

Due to the etching at this time, the tip of the bird's beak retreats, and if this retreat distance is tr*, then the width of the field oxide film 20 is W-2 (α molecule β1 − rl )+
It becomes 2 (α嘗+β snow-r!).

As mentioned above, according to the new selective oxidation method used in the present invention, the wandering difference that occurs when forming the field oxide film 20 from the resist pattern 11 is 2 (α, +β5−rs)−2(α1 +βcloud − r
), and the conversion difference of 38@ due to the same type of process is ξ, which is generated in each opposite direction K11ljJ. Therefore, the conversion difference 2 (α1 + βs - rl) and the conversion difference 2 (αs + Is
-rt) and t, it is possible to completely eliminate the overall pattern conversion difference.

For example, by making the d% first and second silicon nitride films 13°16 5JILts, the t difference 2ai due to side etching and the 2-1 gold are canceled out, and the acronym of the polycrystalline silicon layer 14 and the polycrystalline silicon By selecting wet oxidation conditions for N14, the conversion difference 2βl and :lIm'lr due to the occurrence of bird's beak can be canceled out. As a result, if the conversion difference 211 and IT are canceled out, the overall pattern conversion difference by the primary selective oxidation method becomes zea, and the field oxide film 20f having the same dimensions as the resist pattern 11 can be formed. If α=α1,
Since %srt*r is relatively small, the thickness of the silicon nitride film 13°16 and the polycrystalline silicon layer 140, as well as the wet oxidation conditions and the By making appropriate changes, it is possible to make the overall pattern F into the same pattern.

The method for manufacturing a living body device according to the present invention uses the new selective oxidation method described above. It is O that has made possible miniaturization and integration.

An embodiment of the present invention applied to the method of manufacturing the fn channel MO8fi cow genitalia device will be explained below with reference to FIG.

Excellent example) Silicon substrate 2 containing Danzu (100) crystal planes
1flFjjJt thermally oxidized film thickness 900A
22V of silicon oxide film is formed and CVD method is applied on top of it!
! +1! Thickness about 100OA? 23 tubes of silicon nitride film 1 are formed using the CVD method.
00 polycrystalline silicon layer 14) is formed. Subsequently, the polycrystalline silicon layer 240 is thermally oxidized to form a 20th silicon oxide #25 having ψj 1600 At, and a film thickness of 100 GA is formed thereon by a 7t*% CVD method.
A second silicon nitride film 26 having V is formed.

Next, a resist pattern 17Yr having an opening 1 is formed using PMPK on the element region preliminary portion and the diffusion wiring layer preliminary charging portion (as shown in FIG. 3).

(1) RK, the second silicon 9ide film pattern 26 is formed by selectively plasma etching the second silicon nitride film 261r as a mask for the resist pattern 27t.
′? After forming the shadow, remove the resist pattern 27Yr (
(Il-Next, the silicon nitride film pattern 26' of @2 is wet oxidized using an oxidation-resistant mask to oxidize the polycrystalline silicon F424i over its entire film thickness. About 2000 thick silicon oxide H2B
? Form. At this time, the polycrystalline silicon layer 24' remains under the second silicon/nitride II pattern 26';
During wet oxidation, oxygen partially penetrates under the silicon gold film pattern 26' on the bottom 2, so that the nitride film pattern 2
A thick silicon oxide film 28 is also formed under the silicon oxide film 6' (as shown in FIG. 6C).

) Next, use ammonium fluoride solution for 30 seconds! After repeated etching, a thin oxide film grew on the silicon nitride film pattern 26' of 142 [After removing it, a second silicon nitride pattern was formed by plasma etching! 6
't# leave.

Further, soil is removed by etching with a second silica oxide@2517 ammonium fluoride solution. Subsequently, the remaining polycrystalline silicon layer 24' is removed by plus 1 etching to form an opening 29t, and at the same time, a thick silicon oxide film 18t is used as a mask of silicon 9 oxide II! 23, and the silicon writing film pattern 23'vr of Dream 1 is now formed on the element area preliminary portion and the diffusion wiring layer planned portion. Next, using the thick silicon oxide film 28 and the second silicon nitride film pattern 23' as a mask, the acceleration is 111Ω4QKeV and the dose is 7.9.
By implanting ray4- ions under the condition of ×lQ”7fW, the field region is doped with impurities to prevent inversion.
(Same figure (4 diagrams shown)).

(Next, the thick silicon oxide layer 28 is etched away using an ammonium fluoride solution.At this time, 22% of the silicon densified film 28 is etched in the area not covered by the first silicon electrification pattern 23'. (Id. IV (e) shown).

(ψ Next, one step of wet oxidation is performed as one screen of $1 silicon nitride film pattern 23' tube oxidation resistance, and the film thickness is 900.
A field oxide film SOW of 0A is formed. At this time, the ions implanted into the field part before the heat treatment fMK are activated, and a glue-type impurity region S1 is formed as a channel stopper under the field oxidation (Fig. 0). .

(vO Next, after etching with ammonium fluoride solution for 30 seconds, the first silicon nitride film pattern xs' was removed by plasma etching, and the first silicon oxide film 22 was further etched and removed with ammonium heptadide solution. p-type silicon base 11 in the element region and diffusion wiring layer region.
12 J I11 will be released.

Then, a film thickness of 70 mm is applied to the exposed surface of the PM silicon substrate 21.
The exposed surface is cleaned by growing a thermal oxide film and removing it by etching with an ammonium chloride solution (i.e., cleaning the substrate surface by wet oxidation).
oxidize and remove the electrified material Vr formed in the process).

&- Next, the gate oxide film 32 of the film bank 700A is formed on the exposed surface of the p-type silicon substrate 21 by 1-salt #1 oxidation. Subsequently, a resist pattern 33fftpH having an opening tube in the area where the transistor is to be formed is made from PIIPK, and the threshold voltage is controlled by ion-implanting phosphorus as a mask in the resist pattern 13Vrn. ).

(y4 Next, Jiftj enhancement fiMO
8) After forming a resist pattern tube with an opening in the pre-forming portion of the transistor, the threshold voltage is controlled by using a hole in which ions are implanted as a mask for the resist pattern tube.

(ig) Next IcCVD method! Il! A polycrystalline silicon layer having a thickness of 4 GOOA is deposited, and after the sheet resistance of the polycrystalline silicon layer is made to be about 4 by diffusion of phosphorus, the ridges are endered to form a gate electrode 34f.

Subsequently, gate oxidation is applied as a mask for the gate electrode 34.
31? Etching and j! The gate electrode 34t is used as a mask and the acceleration voltage is set to 40@V.

Condition riit*t(ty
After the implantation, an oxidation treatment is performed for 30 minutes in a dry acid atmosphere at 1000° C. At this time, the implanted ions are activated by the O heat treatment and the source region J5 and drain region 36 of a~ are formed. (same figure (illustration)).

(2) Next, after depositing interlayer insulation $37 consisting of 810 mg of CVD according to a conventional method, ; Al tlL aluminum wiring 38r is formed by opening holes, vapor deposition and patterning of aluminum ζ nium, and an n-channel M
Obtain an Oa type semiconductor AF tube (see the same figure).

According to the above example, since there is almost no pattern conversion difference in the selective treatment method for forming the element region, for example, if PIP technology with a resolution of 1.5 μm is used, #i1.5 μm
According to the rules, semiconductor device tubes can be manufactured.
MOjl [It is possible to achieve better miniaturization and higher integration of elements in semiconductor devices, and it is possible to achieve better miniaturization and higher integration of elements in semiconductor devices.Moreover, it is a manufacturing method using the conventional selective selection method in which a thick field oxide film is embedded in a silicon substrate. Advantages are provided in that meeting.

Note that the present invention applies not only to n-channel MO83 semiconductor devices, but also to p-channel MOa-type semiconductor devices and complementary M
Needless to say, the present invention can be similarly applied to the manufacturing method of the O8 semiconductor device IKFi bipolar semiconductor device.

As described in detail above, according to the present invention, it is possible to provide a method for manufacturing a semiconductor device that can achieve miniaturization of elements and high integration by using a selective oxidation method with almost no difference in pattern conversion.

[Brief explanation of drawings]

Figure 1 shows the process of the conventional selective oxidation method.
L2-(→～(b)) Figure 3 shows the selective oxidation method used in the production method of the present invention.
~ (mu) is applied to the production of the present invention-fm channel MOa type semiconductor device, and there is a cross section shown in the figure below. DESCRIPTION OF SYMBOLS 11...Silicon substrate, 12...Silicone oxide M, Js...1st silicon nitride film, 13'...
・I! 1 silicon nitride film pattern, 14... polycrystalline silicon layer, 15... silicon oxide film of island 2, 16...
...p,2 silicon nitride film, 16'...l1lIl
! 2 silicon nitride film pattern, 17... resist no (turn), 18... thick silicon nitride film, 19...
Opening portion, 20...field oxide film. Applicant's agent Patent attorney Suzu Etake Hiko 99- Heichi ^ ^ Heri, Ω
°0ri 9
%JΦ C I −〆Kura N GI C) to
8"0 0 - - - II-σ

Claims (1)

[Claims] (1) Step of sequentially forming 1 f) oxide film, oxidation resistant film 1, polycrystalline conductor layer, oxide film 2 and straightening resistance St 2 on conductivity type semiconductor substrate. and the second
a step of forming 82 oxidation-resistant film patterns having openings on the planned completion area of the oxidation-resistant film; and using the second oxidation-resistant film pattern as a mask, A step of selectively converting the non-master portion of the polycrystalline conductor layer into KJIL oxidation lIK by oxidizing the crystalline semiconductor layer 1, and the oxidation-resistant film pattern of Part 2 above and the f below it.
The second oxide film is removed, and the polycrystalline semiconductor (the polycrystalline semiconductor remaining under the pattern) is removed to form a hole tube surrounded by the thick oxide film. forming an IKIO oxidation resistance test pattern by etching the first oxidation resistance gland t using the thick oxide film surrounding the button hole as a mask; ?A portion of the first oxide film that is removed and not covered by the first oxidation-resistant film pattern? Before removing the first oxidation-resistant film pattern, the semiconductor substrate is used as a mask. forming a thick field oxide mt in the non-mask portion by oxidation;
A step of removing the first oxidation-resistant film pattern? A method for manufacturing a semiconductor device, comprising: After forming the oxidation-resistant film pattern tube of island 1 by etching the first oxidation-resistant film as a thick oxidation muff mask, one hole is formed.
Said thick revision experience and II! 1. Inversion prevention treatment tube by injecting impurity Qlk1 of the same conductivity type as the semiconductor substrate as a mask for the insulating film r? A method for sorting a semiconductor device according to claim α), characterized in that: T.