JPS5844597Y2 - Lead structure for IC package - Google Patents

Lead structure for IC package

Info

Publication number
JPS5844597Y2
JPS5844597Y2 JP18059478U JP18059478U JPS5844597Y2 JP S5844597 Y2 JPS5844597 Y2 JP S5844597Y2 JP 18059478 U JP18059478 U JP 18059478U JP 18059478 U JP18059478 U JP 18059478U JP S5844597 Y2 JPS5844597 Y2 JP S5844597Y2
Authority
JP
Japan
Prior art keywords
lead
pin
package
bonding
brazing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP18059478U
Other languages
Japanese (ja)
Other versions
JPS5596661U (en
Inventor
英彦 赤崎
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP18059478U priority Critical patent/JPS5844597Y2/en
Publication of JPS5596661U publication Critical patent/JPS5596661U/ja
Application granted granted Critical
Publication of JPS5844597Y2 publication Critical patent/JPS5844597Y2/en
Expired legal-status Critical Current

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  • Lead Frames For Integrated Circuits (AREA)

Description

【考案の詳細な説明】 本考案は半導体IC等に対しその外装保護容器通称プラ
グインタイブパッケージ(Plug In TypeP
ackage)を形式する際パック内部の接続加工に適
用するリードピン構造に関す。
[Detailed description of the invention] The present invention provides an outer protective case for semiconductor ICs, commonly known as a plug-in type package.
Regarding the lead pin structure that is applied to the connection process inside the pack when formatting the package.

近時半導体等ICチップの集積度の増大に伴ない、単位
のパッケージ接続リード端子(以下単にリード又はリー
ドピンと言う)数も50本あるいはそれ以上と増加して
来ており、又このパッケージ体が機器導入にはプラグイ
ン形式で効率よく実装されることが要求されている。
In recent years, with the increase in the degree of integration of IC chips such as semiconductors, the number of connection lead terminals (hereinafter simply referred to as leads or lead pins) per unit package has also increased to 50 or more. Equipment introduction requires efficient implementation in plug-in format.

本考案はかかる実装条件を意図し、該パッケージ体内部
においてリードピンとICチップ引出導体(以下リード
パターンと言う)との鑞づけ接合を効率よくかつ高い接
合強さで実現しうるリード構造につき提示するものであ
る。
The present invention is intended for such mounting conditions, and proposes a lead structure that can efficiently and with high bonding strength realize brazing bonding between lead pins and IC chip lead-out conductors (hereinafter referred to as lead patterns) inside the package body. It is something.

第1図は従来の前記鑞づけ加工に係わる全体構造斜視図
並に部分断面図である。
FIG. 1 is a perspective view and a partial sectional view of the overall structure related to the conventional brazing process.

同イ図は上蓋を取除いたパッケージ体の斜視図、同口図
は接合要部の断面図、並にへ図は8図の基板に予じめメ
タライズ形式されたリードパターン平面図である。
Figure 8 is a perspective view of the package body with the top cover removed, figure 8 is a sectional view of the main parts to be joined, and figure 8 is a plan view of the lead pattern pre-metalized on the substrate of figure 8.

イ図の1はICチップ、2と3は夫々リードパターンと
該リードパターン2とリードピンとの接合になる鑞1づ
け接合個所を示し、当然ながら3の部処はリードピン径
公差より若干大きめの孔が多数整列配置しである。
In the figure, 1 indicates the IC chip, 2 and 3 indicate the lead pattern and the solder 1 joint location where the lead pattern 2 and the lead pin are joined.Of course, the location 3 is a hole slightly larger than the lead pin diameter tolerance. are arranged in a large number.

そして4はアルミナ組成等からなるセラミック基板であ
る。
And 4 is a ceramic substrate made of alumina composition or the like.

8図は前記3の部処、接合部断面構造であり、該図によ
り従来加工方法を概略説明する。
FIG. 8 shows the cross-sectional structure of the joint portion of the above-mentioned portion 3, and the conventional processing method will be briefly explained with reference to this figure.

5はリードピン、リードピン頭部は例示の如くヘッダー
で端面潰しをかけ安定な接合強度が保証されるよう考慮
されている。
5 is a lead pin, and the head of the lead pin is designed to crush the end face with a header as shown in the example to ensure stable bonding strength.

尚リードピン5は一般の軟銅線よりもむしろ機械的強度
の高い例えば鉄(Fe)、ニッケル(Ni)、コバルト
(Co)系の合金ピンを用いる。
For the lead pin 5, an alloy pin of iron (Fe), nickel (Ni), or cobalt (Co), which has high mechanical strength, is used rather than a general annealed copper wire.

リードピン5はリードパターン2の接合個所3に装着す
るが、この際適宜形状に成形の鑞付素片、例えば図示リ
ング状素片6を介してリードピン5と共に挿入される。
The lead pin 5 is attached to the joint portion 3 of the lead pattern 2. At this time, the lead pin 5 and the lead pin 5 are inserted through a brazing piece formed into an appropriate shape, for example, a ring-shaped piece 6 as shown.

該リング状素片6に替り他の方法としてへのリードパタ
ーン5の面上あるいは周辺に厚膜のペースト状鑞材を塗
着付加等するなりして行なうことも出来る。
Instead of using the ring-shaped piece 6, it is also possible to apply a thick film of paste-like solder material on or around the surface of the lead pattern 5.

このように従来、リードピン5の接合に際してはリード
パターン上にリードピンと鑞材とを別個に準備してセッ
トするため、リードピン数に比例して非常に多くの工数
を要する不都合さがあった。
As described above, conventionally, when joining the lead pins 5, the lead pins and the solder material are separately prepared and set on the lead pattern, which has the disadvantage of requiring a very large number of man-hours in proportion to the number of lead pins.

尚又リング状素片6を介してセットした場合は以後工程
の鑞付加工処理でリードピンがセラミック基板4から浮
き出すこともあり鑞付不良となることが問題であった。
Furthermore, when the lead pins are set through the ring-shaped pieces 6, there is a problem in that the lead pins may come out from the ceramic substrate 4 during the subsequent brazing process, resulting in poor brazing.

本考案はこれを解消すべくなされたもので、その特徴と
するところはセラミック等絶縁基板にプラグインタイブ
のICパッケージングをなすり−ドピンとリードパター
ンとの接合構成に於いて、該接合に関与するリードピン
の頭部に予じめ接合鑞材がクラッドされているICパッ
ケージ用リード構造にある。
The present invention was developed to solve this problem, and its feature is that plug-in type IC packaging is performed on an insulating substrate such as a ceramic. There is a lead structure for an IC package in which the heads of the lead pins involved are previously clad with a bonding filler material.

以下、本考案になるリード構造を示す第2図に従って詳
細に説明する。
Hereinafter, the lead structure of the present invention will be described in detail with reference to FIG. 2.

同図の5は第1図口の頭部形状をもつリードピン、しか
してその頭部面上には接合に関与する銀(Ag)・銅(
Cu)共晶合金からなる鑞材7が機械的に圧接、かしめ
られ所謂クラッドとして装着される。
5 in the figure is a lead pin with the head shape of the opening in Figure 1, and on the head surface there is silver (Ag) and copper (
A brazing material 7 made of a Cu) eutectic alloy is mechanically pressed and caulked and installed as a so-called cladding.

該クラッド装着は前記ヘッダー加工の後工程でなされる
The cladding is carried out in a process subsequent to the header processing.

クラッド層の厚さは予じめ接合点に所要とする最小限の
量を見込んで決めるが、凡そ30〜50μ(ミクロン1
0 ’cm)もあればよい。
The thickness of the cladding layer is determined in advance by taking into account the minimum amount required at the junction, but it is approximately 30 to 50 μm (1 micron).
0 'cm) is also sufficient.

かようなりラッド処理したリード構造にしておけば従来
あったような作業の繁雑さは解消される。
If the lead structure is rudd-treated like this, the complexity of the conventional work will be eliminated.

即ち接合個所セラミック基板4に接合リードピン5を挿
入し、挿入後リード頭部面の面出しを行ない然る後鑞付
処理を約800℃近辺ですれば第3図の如き接合が完了
する。
That is, the joining lead pin 5 is inserted into the ceramic substrate 4 at the joining location, and after insertion, the surface of the lead head is leveled, followed by a brazing process at about 800 DEG C., and the joining as shown in FIG. 3 is completed.

前記リード構造の採用により鑞付クラツド化工程を新し
く設ける要はあるが、リードピンとリードパターンと接
合作業は簡素化され綜合的にパッケージング工数の低減
に寄与するは明らかである。
Although adoption of the lead structure requires a new brazing cladding process, it is clear that the work of joining lead pins, lead patterns, and bonding is simplified, contributing to an overall reduction in packaging man-hours.

以上の説明に引用した図に於いて、例えばり−ドピンは
円断面形のもので説明したが、これは矩形断面のリード
板で構成してもよく、尚又クラッド形状等についても何
ら図示例に限定されるものではない。
In the figures cited in the above explanation, for example, the lead-doped pin is explained as having a circular cross section, but it may also be composed of a lead plate with a rectangular cross section, and there are no illustrated examples of the cladding shape, etc. It is not limited to.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図イは従来構成になるパッケージ体斜視図、同図口
は接合部の要部断面図、ハ図は8図の基板4に予じめ形
成されたリードパターン平面図、第2図は本考案になる
リード構造を示す断面図及び第3図は接合完了状態を示
す断面図である。 図中、1・・・・・・ICチップ、2・・・・・・リー
ドパターン、3・・・・・・接合個所、4・・・・・・
セラミック基板、5・曲・リードピン、6・・・・・・
リング状鑞材、7・・曲クラッド鑞材。
Figure 1A is a perspective view of a package with a conventional configuration, the opening in the figure is a sectional view of the main part of the joint, Figure C is a plan view of the lead pattern pre-formed on the substrate 4 in Figure 8, and Figure 2 is A cross-sectional view showing the lead structure according to the present invention and FIG. 3 are cross-sectional views showing a state in which the bonding is completed. In the figure, 1...IC chip, 2...lead pattern, 3...junction, 4...
Ceramic board, 5/curve/lead pin, 6...
Ring-shaped brazing material, 7...Curved cladding brazing material.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] セラミック等絶縁基板にプラグインタイブのICパッケ
ージングをなすリードピンとリードパターンとの接合構
成に於いて、該接合に関与するノードピンの頭部に予し
め接合鑞材がクラッドされていることを特徴とするIC
パッケージ用リード構造。
In the bonding configuration between a lead pin and a lead pattern for plug-in type IC packaging on an insulating substrate such as a ceramic, the head of the node pin involved in the bonding is preliminarily clad with a bonding filler material. IC
Lead structure for packaging.
JP18059478U 1978-12-26 1978-12-26 Lead structure for IC package Expired JPS5844597Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18059478U JPS5844597Y2 (en) 1978-12-26 1978-12-26 Lead structure for IC package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18059478U JPS5844597Y2 (en) 1978-12-26 1978-12-26 Lead structure for IC package

Publications (2)

Publication Number Publication Date
JPS5596661U JPS5596661U (en) 1980-07-04
JPS5844597Y2 true JPS5844597Y2 (en) 1983-10-08

Family

ID=29192275

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18059478U Expired JPS5844597Y2 (en) 1978-12-26 1978-12-26 Lead structure for IC package

Country Status (1)

Country Link
JP (1) JPS5844597Y2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2697987B2 (en) * 1992-01-27 1998-01-19 松下電工株式会社 Electronic component with connection terminal and mounting method

Also Published As

Publication number Publication date
JPS5596661U (en) 1980-07-04

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