JPS5843075U - Synchronous AGC circuit - Google Patents
Synchronous AGC circuitInfo
- Publication number
- JPS5843075U JPS5843075U JP13712481U JP13712481U JPS5843075U JP S5843075 U JPS5843075 U JP S5843075U JP 13712481 U JP13712481 U JP 13712481U JP 13712481 U JP13712481 U JP 13712481U JP S5843075 U JPS5843075 U JP S5843075U
- Authority
- JP
- Japan
- Prior art keywords
- synchronous
- agc circuit
- video signal
- signal
- delaying
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
- Television Receiver Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の同期ＡＧＣ回路のブロック図、第２図及
び第３図は第１図の回路の要部の波形を示す図、第４図
は本考案の同期ＡＧＣ回路の一実施例のブロック図、第
５図及び第６図は第４図の回路の要部の波形を示す図で
ある。
図中符号３はＡＧＣ増幅器、４はくし形フィルタ、５は
同期クランプ回路、６は同期分離回路、８はＡＧＣ検波
器、１０は単安定÷ルチバイブレータ、１１は遅延回路
である。FIG. 1 is a block diagram of a conventional synchronous AGC circuit, FIGS. 2 and 3 are diagrams showing waveforms of the main parts of the circuit in FIG. 1, and FIG. 4 is an example of the synchronous AGC circuit of the present invention. The block diagrams, FIGS. 5 and 6, are diagrams showing waveforms of essential parts of the circuit of FIG. 4. In the figure, reference numeral 3 is an AGC amplifier, 4 is a comb filter, 5 is a synchronous clamp circuit, 6 is a synchronous separation circuit, 8 is an AGC detector, 10 is a monostable/multivibrator, and 11 is a delay circuit.
Claims (1)
前記ビデオ信号から分離した同期信号を遅延したパルス
によって同期検波を行ない制御される同期ＡＧＣ回路に
おいて、前記ビデオ信号から分離した同期信号の後縁で
トリガされる単安定マルチバイブレータを具備し、シ、
該単安定マルチバイブレータの出力パルスで前記同期信
号を遅延したパルスを得るよう構成したことを特徴とす
る同期ＡＧＣ回路。A video signal pedestal with a clamped sync tip,
The synchronous AGC circuit is controlled by performing synchronous detection using pulses obtained by delaying the synchronous signal separated from the video signal, comprising a monostable multivibrator triggered by the trailing edge of the synchronous signal separated from the video signal,
A synchronous AGC circuit characterized in that the output pulse of the monostable multivibrator is configured to obtain a pulse obtained by delaying the synchronous signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13712481U JPS5843075U (en) | 1981-09-17 | 1981-09-17 | Synchronous AGC circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13712481U JPS5843075U (en) | 1981-09-17 | 1981-09-17 | Synchronous AGC circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5843075U true JPS5843075U (en) | 1983-03-23 |
Family
ID=29930417
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13712481U Pending JPS5843075U (en) | 1981-09-17 | 1981-09-17 | Synchronous AGC circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5843075U (en) |
-
1981
- 1981-09-17 JP JP13712481U patent/JPS5843075U/en active Pending
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