JPS63318870A - Separating circuit for synchronizing pulse of picture signal - Google Patents

Separating circuit for synchronizing pulse of picture signal

Info

Publication number
JPS63318870A
JPS63318870A JP62152436A JP15243687A JPS63318870A JP S63318870 A JPS63318870 A JP S63318870A JP 62152436 A JP62152436 A JP 62152436A JP 15243687 A JP15243687 A JP 15243687A JP S63318870 A JPS63318870 A JP S63318870A
Authority
JP
Japan
Prior art keywords
synchronizing pulse
picture signal
pulse
horizontal synchronizing
separated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62152436A
Other languages
Japanese (ja)
Inventor
Keijiro Nishimura
西村 啓二朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62152436A priority Critical patent/JPS63318870A/en
Publication of JPS63318870A publication Critical patent/JPS63318870A/en
Pending legal-status Critical Current

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  • Synchronizing For Television (AREA)
  • Picture Signal Circuits (AREA)

Abstract

PURPOSE:To obtain a horizontal synchronizing pulse free from a noise component by separating a synchronizing pulse of a picture signal and then extracting the repetitive frequency component of the horizontal synchronizing pulse of said separated synchronizing pulse through a band-pass filter (BPF). CONSTITUTION:A diode clamper consisting of a capacitor 2 and a diode 3 fixes the tip of the synchronizing pulse of an inputted picture signal at a ground level when a picture signal is supplied to a picture signal input terminal 1. The synchronizing pulse is separated from the picture signal by a voltage comparator 4 having the reference voltage Vref. Then a basic wave equal to the repetitive frequency of the horizontal synchronizing pulse of the picture signal is extracted out of said separated signal by a BPF 6 having a center frequency equal to the repetitive frequency of the horizontal synchronizing pulse of the picture signal. Furthermore the extracted signal is transformed into a pulse by a limiter 7 and the width of this pulse is controlled by a monostable multivibrator 8. Thus it is possible to delete the noise component and to separate an accurate horizontal synchronizing pulse.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は画像信号のクランパなどに使用される画像信号
の同期パルス分離回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image signal synchronous pulse separation circuit used in an image signal clamper or the like.

〔従来の技術〕[Conventional technology]

従来、この種の画像信号の同期パルス分離回路は、第3
図に示すように、コンデンサ2とダイオード3から構成
されるダイオードクランパと電圧比較器4から成る。こ
の回路は、入力端子1に第4図(4)の信号が入力され
ると、ダイオードクランツクで同期ノやルスの先端がク
ランプされる。このフランジ電圧を電圧比較器4に入力
し、電圧比較器4の比較電圧入力端子5には第4図の基
準電圧Vreft−加えることで第4図(B)のような
同期パルスを分離している。
Conventionally, this type of image signal synchronization pulse separation circuit has a third
As shown in the figure, it consists of a diode clamper made up of a capacitor 2 and a diode 3, and a voltage comparator 4. In this circuit, when the signal shown in FIG. 4 (4) is input to the input terminal 1, the ends of the synchronization pulses are clamped by the diode crank. This flange voltage is input to the voltage comparator 4, and the reference voltage Vreft- shown in FIG. 4 is applied to the comparison voltage input terminal 5 of the voltage comparator 4, thereby separating the synchronization pulses as shown in FIG. There is.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の画像信号の同期パルス分離回路は、第5
図(C)で示すように1画像信号に電圧比較器40基準
電圧Vy 61よシも低い電圧レベルを有する雑音vN
があると、第5図の)のように分離された同期/4’ル
スにも雑音SNが発生するという欠点がある。
The conventional image signal synchronization pulse separation circuit described above has a fifth
As shown in FIG.
If there is, there is a drawback that noise SN is generated even in the separated synchronous/4' pulse as shown in FIG. 5).

〔問題点を解決するための手段〕[Means for solving problems]

本発明による画像信号同期iEルス分離回路は。 The image signal synchronization iE pulse separation circuit according to the present invention is as follows.

第1図に示すように、コンデンサ2とダイオード3よシ
成るダイオードクランパと、電圧比較器4と2画像信号
の同期A’ルスの繰り返し周波数を中心周波数とする帯
域通過フィルタ6と、リミッタ7と、このリミッタ出力
のノクルス幅調整のためのモノステーブルマルチバイブ
レータとヲ有シている。
As shown in FIG. 1, a diode clamper consisting of a capacitor 2 and a diode 3, a voltage comparator 4, a bandpass filter 6 whose center frequency is the repetition frequency of the synchronization A' pulse of the two image signals, and a limiter 7. This limiter has a monostable multivibrator for adjusting the Nockle width of the output.

〔実施例〕〔Example〕

第1図は本発明の一実施例である。第1図中のコンデン
サ2とダイオード3から成るダイオードクランパは、第
2図(、)で示される画像信号が画像信号入力端子1に
入力されると、入力された画像信号の同期パルスの先端
をグランドレベルに固定する。この同期パルスの先端が
グランドレベルに固定された画像信号から、第2図(a
)の基準電圧vrefヲ有する電圧比較器4で第2図(
b)に示すような同期パルスが分離される。この分離信
号は次に。
FIG. 1 shows an embodiment of the present invention. When the image signal shown in FIG. 2 (,) is input to the image signal input terminal 1, the diode clamper consisting of a capacitor 2 and a diode 3 in FIG. Fixed at ground level. From the image signal with the tip of this synchronization pulse fixed at the ground level,
) with the voltage comparator 4 having a reference voltage vref of
The synchronization pulses as shown in b) are separated. This separated signal is next.

画像信号の水平同期パルスの繰り返し周波数全中心周波
数とする帯域通過フィルタ6で、水平同期/−f’ルス
繰り返し周波数と同一の基本波が抽出される。更に、こ
の抽出された信号はリミッタ7で第2図(C)のように
ノクルス化され、モノステーブルマルチバイブレータ8
で第2図(d)のように/J?ルス幅が調整される。
A fundamental wave that is the same as the horizontal synchronization/-f' pulse repetition frequency is extracted by the bandpass filter 6 which uses the repetition frequency of the horizontal synchronization pulse of the image signal as the entire center frequency. Furthermore, this extracted signal is converted into a nockle signal by a limiter 7 as shown in FIG.
As shown in Figure 2(d), /J? The loop width is adjusted.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明では2画像信号の同期パルス
を分離した後、その同期パルスの水平同期・やルスの繰
り返し周波数の成分を帯域通過フィルタで抽出し、その
抽出した信号から水平同期ノクルスを作シ出している。
As explained above, in the present invention, after separating the synchronization pulses of two image signals, the horizontal synchronization and pulse repetition frequency components of the synchronization pulses are extracted using a band-pass filter, and the horizontal synchronization Noculus is extracted from the extracted signal. It is being produced.

それ故2画像信号に雑音がのっている場合にも、帯域通
過フィルタにより雑音成分は除去され、正確な水平同期
パルスを分離できる。
Therefore, even if there is noise in the two image signals, the noise component is removed by the bandpass filter, and accurate horizontal synchronizing pulses can be separated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の回路ブロック図。 第2図は第1図の主要点における信号波形であシ。 第3図は従来の画像信号同期パルス分離回路のブロック
図、第4図は第3図の回路の入出力波形を示し、第5図
は第3図の回路の入出力波形を示す。 4:電圧比較器、6:帯域通過フィルタ、7:リミッタ
、8:モノステーブルマルチバイブレータ。 第1図 第2図 置     1 畳     :: (b)  −m−Jl」−m−」1−−(りm−「−シ
ー「− (d)−」シー−几−
FIG. 1 is a circuit block diagram of an embodiment of the present invention. FIG. 2 shows signal waveforms at major points in FIG. 1. FIG. 3 is a block diagram of a conventional image signal synchronization pulse separation circuit, FIG. 4 shows input/output waveforms of the circuit of FIG. 3, and FIG. 5 shows input/output waveforms of the circuit of FIG. 3. 4: Voltage comparator, 6: Bandpass filter, 7: Limiter, 8: Monostable multivibrator. Figure 1 Figure 2 1 Tatami :: (b) -m-Jl"-m-"1--(rim-"-shi"- (d)-"shi-几-

Claims (1)

【特許請求の範囲】[Claims] 1、画像信号の同期パルスの先端を一定の直流電圧レベ
ルに固定するクランパと、該クランパにより一定直流電
圧レベルに固定された同期パルスを分離する電圧比較器
より構成される画像信号同期パルス分離回路において、
前記電圧比較器により分離された同期パルスの繰り返し
周波数成分を抽出する帯域通過フィルタと、抽出された
繰り返し周波数成分をパルス化するリミッタと、該リミ
ッタの出力パルス幅を調整するモノステーブルマルチバ
イブレータとを設けたことを特徴とする画像信号同期パ
ルス分離回路。
1. Image signal synchronization pulse separation circuit consisting of a clamper that fixes the tip of the synchronization pulse of the image signal to a constant DC voltage level, and a voltage comparator that separates the synchronization pulse fixed to the constant DC voltage level by the clamper. In,
A bandpass filter that extracts the repetitive frequency component of the synchronization pulse separated by the voltage comparator, a limiter that converts the extracted repetitive frequency component into a pulse, and a monostable multivibrator that adjusts the output pulse width of the limiter. An image signal synchronization pulse separation circuit characterized by being provided.
JP62152436A 1987-06-20 1987-06-20 Separating circuit for synchronizing pulse of picture signal Pending JPS63318870A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62152436A JPS63318870A (en) 1987-06-20 1987-06-20 Separating circuit for synchronizing pulse of picture signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62152436A JPS63318870A (en) 1987-06-20 1987-06-20 Separating circuit for synchronizing pulse of picture signal

Publications (1)

Publication Number Publication Date
JPS63318870A true JPS63318870A (en) 1988-12-27

Family

ID=15540492

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62152436A Pending JPS63318870A (en) 1987-06-20 1987-06-20 Separating circuit for synchronizing pulse of picture signal

Country Status (1)

Country Link
JP (1) JPS63318870A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0392085A (en) * 1989-09-05 1991-04-17 Mitsubishi Electric Corp Synchronizing separator circuit
US5436667A (en) * 1992-09-17 1995-07-25 Thomson Consumer Electronics, Inc. Multi-input television receiver with combined clamping and synchronizing signal separation circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0392085A (en) * 1989-09-05 1991-04-17 Mitsubishi Electric Corp Synchronizing separator circuit
US5436667A (en) * 1992-09-17 1995-07-25 Thomson Consumer Electronics, Inc. Multi-input television receiver with combined clamping and synchronizing signal separation circuit

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