JPS5877374A - Horizontal afc device for television receiver - Google Patents

Horizontal afc device for television receiver

Info

Publication number
JPS5877374A
JPS5877374A JP17608381A JP17608381A JPS5877374A JP S5877374 A JPS5877374 A JP S5877374A JP 17608381 A JP17608381 A JP 17608381A JP 17608381 A JP17608381 A JP 17608381A JP S5877374 A JPS5877374 A JP S5877374A
Authority
JP
Japan
Prior art keywords
horizontal
circuit
transistor
television receiver
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17608381A
Other languages
Japanese (ja)
Inventor
Makoto Kikuchi
真 菊池
Katsuhiro Osada
長田 勝弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP17608381A priority Critical patent/JPS5877374A/en
Publication of JPS5877374A publication Critical patent/JPS5877374A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/04Synchronising
    • H04N5/12Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
    • H04N5/126Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising whereby the synchronisation signal indirectly commands a frequency generator

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To decrease the adverse effect due to noise, by picking up a horizontal synchronizing signal only from an output of a synchronization separating circuit. CONSTITUTION:A horizontal synchronizing signal being an output of a synchronization separating circuit 2 is applied to a base of a transistor (TR) 10, a flyback pulse is applied to the collector of the TR10 from a terminal 11 to conduct the TR10 for this pulse period. The emitter of the TR10 is grounded via a resistor 12, and the horizontal synchronizing signal only is picked up from the emitter and applied to a horizontal AFC detection circuit 4.

Description

【発明の詳細な説明】 本発明はテレビジョン受像機の水平ムFC装置に関する
ものであり、同期分離回路の出力である水平同期信号中
の雑音による悪影響を除去しようとするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a horizontal FC device for a television receiver, and is intended to eliminate the adverse effects of noise in a horizontal synchronization signal output from a synchronization separation circuit.

第1図に示すように入力端子1に加えられた映像信号は
同期分離回路2で同期分離され、その出−−Z 力である水平同期信号はノイズ除去回路3を介して水平
ムyc検波回路4に加えられる。この水平ムFC検波回
路4には水平のこぎり波電圧発生回路6よりののこぎり
波6が加えられている。水平ムyc検波回路4の検波出
力は低域フィルタ6を介して水平発振回路7に加えられ
ている。8は垂直発振回路、9は垂直トリガ回路である
As shown in FIG. 1, the video signal applied to the input terminal 1 is synchronously separated by the synchronous separator 2, and its output, the horizontal synchronous signal, is sent to the horizontal muyc detection circuit via the noise removal circuit 3. Added to 4. A sawtooth wave 6 from a horizontal sawtooth voltage generation circuit 6 is applied to the horizontal FC detection circuit 4 . The detected output of the horizontal mu-yc detection circuit 4 is applied to a horizontal oscillation circuit 7 via a low-pass filter 6. 8 is a vertical oscillation circuit, and 9 is a vertical trigger circuit.

従来のノイズ除去回路3の一例は、同期分離回路2から
の水平同期信号をたとえば同期信号の頭部でスライスし
て同期信号より上に出たノイズを除去するものである。
An example of the conventional noise removal circuit 3 is to slice the horizontal synchronization signal from the synchronization separation circuit 2, for example, at the head of the synchronization signal to remove noise appearing above the synchronization signal.

このノイズ除去回路では走査期間に存在するノイズ成分
は同期信号の頭部より下のものは残ることになり、この
ノイズが水平ムyc検波回路4を出て水平発振回路7に
悪影響を与えることになる。
In this noise removal circuit, noise components existing during the scanning period below the head of the synchronizing signal remain, and this noise exits the horizontal muyc detection circuit 4 and adversely affects the horizontal oscillation circuit 7. Become.

そこで、本発明は上記のような悪影響を除去しようとす
るものであり、以下本発明の一実施例について図面とと
もに説明する。
Therefore, the present invention aims to eliminate the above-mentioned adverse effects, and one embodiment of the present invention will be described below with reference to the drawings.

ブロック図は第1図と同じであるが、ノイズ除去回路は
第2図に示す通りである0すなわち、同期分離2の出力
である第3図亀に示す水平同期信号ヲトランジスタ1o
のベースに加え、同トランジスタ10のコレクタに端子
11より第3図すに示すフライバックパルスを加え、こ
のパルス期間だけトラン、ジスタ1oが導通状態となる
ようにする。トランジスタ10のエミッタは抵抗12を
介して接地され、また、エミッタより第3図Cの出力が
取出され水平ムyc検波回路4に加えられる。
The block diagram is the same as in Fig. 1, but the noise removal circuit is as shown in Fig. 2. In other words, the horizontal synchronization signal shown in Fig. 3, which is the output of synchronous separation 2, is transferred to the transistor 1o.
In addition to the base of the transistor 10, a flyback pulse as shown in FIG. The emitter of the transistor 10 is grounded through a resistor 12, and the output shown in FIG.

このように、フライバックパルスの期間だけ水平同期信
号を取出すようにしたので走査期間におけるノイズは除
去され、水平発振に悪影響を与えることがなくなるもの
である。
In this way, since the horizontal synchronizing signal is extracted only during the flyback pulse period, noise during the scanning period is removed and does not adversely affect horizontal oscillation.

以上のように本発明によれば同期分離回路の出力より水
平同期信号のみを抜き出すようにしたのでノイズによる
悪影響を少くすることができるものである。
As described above, according to the present invention, only the horizontal synchronization signal is extracted from the output of the synchronization separation circuit, so that the adverse effects of noise can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来例におけるテレビジョン受像機の水平ムy
c装置のブロック線図、第2図は本発明の一実施例にお
けるテレビジョン受像機の水平ムyc装置の要部の回路
図、第3図a、b、aは同装置説明のだめの波形図であ
る。 2・・・・・・同期分離回路、6・・・・・・水平のこ
ぎシ波電圧発生回路、10・・・・・・トランジスタ、
12・・・・・・抵抗、11・・・・・・端子、4・・
・・・・水平ムyc検波回路。 代理人の氏名 弁理士 中 尾 敏 男 ほか1基部 
1 図 、Q 第2図 第3図
Figure 1 shows the horizontal angle of a conventional television receiver.
Fig. 2 is a circuit diagram of the main part of the horizontal muyc device of a television receiver according to an embodiment of the present invention, and Fig. 3 a, b, and a are waveform diagrams for explaining the same device. It is. 2... Synchronous separation circuit, 6... Horizontal sawtooth voltage generation circuit, 10... Transistor,
12...Resistance, 11...Terminal, 4...
...Horizontal mu yc detection circuit. Name of agent: Patent attorney Toshio Nakao and 1 other group
1 Figure, Q Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 同期分離回路で得られた水平同期信号をトランジスタの
ベースに加え、このトランジスタのコレクタにフライバ
ックパルスを加え、このフライバックパルス期間のみこ
のトランジスタが導通するよう構成し、上記トランジス
タのエミッタを抵抗を介して接地するとともに、同エミ
ッタに得られる出力と水平のこぎシ波電圧発生回路のの
こぎり波を水平ムyc検波回路に加えたテレビジョン受
像機の水平ムyc装置。
The horizontal synchronization signal obtained by the synchronization separation circuit is applied to the base of the transistor, a flyback pulse is applied to the collector of this transistor, the transistor is made conductive only during this flyback pulse period, and the emitter of the transistor is connected to a resistor. A horizontal muyc device for a television receiver, in which the output obtained from the emitter and the sawtooth wave of a horizontal sawtooth voltage generation circuit are added to a horizontal muyc detection circuit.
JP17608381A 1981-11-02 1981-11-02 Horizontal afc device for television receiver Pending JPS5877374A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17608381A JPS5877374A (en) 1981-11-02 1981-11-02 Horizontal afc device for television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17608381A JPS5877374A (en) 1981-11-02 1981-11-02 Horizontal afc device for television receiver

Publications (1)

Publication Number Publication Date
JPS5877374A true JPS5877374A (en) 1983-05-10

Family

ID=16007417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17608381A Pending JPS5877374A (en) 1981-11-02 1981-11-02 Horizontal afc device for television receiver

Country Status (1)

Country Link
JP (1) JPS5877374A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5760839A (en) * 1993-05-19 1998-06-02 Kabushiki Kaisha Toshiba Horizontal synchronizing apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5760839A (en) * 1993-05-19 1998-06-02 Kabushiki Kaisha Toshiba Horizontal synchronizing apparatus

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