JPS5842235A - Semiconductor dry-type etching device - Google Patents

Semiconductor dry-type etching device

Info

Publication number
JPS5842235A
JPS5842235A JP14033081A JP14033081A JPS5842235A JP S5842235 A JPS5842235 A JP S5842235A JP 14033081 A JP14033081 A JP 14033081A JP 14033081 A JP14033081 A JP 14033081A JP S5842235 A JPS5842235 A JP S5842235A
Authority
JP
Japan
Prior art keywords
wafer
linear
conveyor belt
substances
belt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14033081A
Other languages
Japanese (ja)
Inventor
Katsuhiko Kitahata
北畑 勝彦
Kazuyoshi Takahashi
高橋 和善
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP14033081A priority Critical patent/JPS5842235A/en
Publication of JPS5842235A publication Critical patent/JPS5842235A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting

Abstract

PURPOSE:To simultaneously perform etching process to the rear of a wafer by providing a conveyor belt composed of a plurality of linear substances which run in parallel to each other. CONSTITUTION:A belt 3 is composed of a plurality of, for example, two pieces, endless linear substances 31 which are wound and laid on a pulley 4 and these linear substances 31 are stretched and provided under the condition of running in parallel to each other so that the space of each linear substance may be narrower than the diameter of a wafer 1. As the material of this linear substance 31, the material having flexibility and unetchable, for example, synthetic resin such as Teflon, is used. The back side of the wafer linearly contacts with the linear substances 31 when the wafer is conveyed. Therefore, etching can also be applied to the back side of the wafer.

Description

【発明の詳細な説明】 本発明は、真空または密室内で半導体ウェハーを乾式エ
ツチングする装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an apparatus for dry etching semiconductor wafers in a vacuum or in a closed room.

この穏の従来のエツチング装置a、第1図(人)および
(B)に示すウェハー1を搬送するベルトとして、金属
薄板を用いている。なお上記ベルト2は、その−面のエ
ツチングを防止するために、該表面なテアay等の合成
樹脂膜で被覆しておる。
In this conventional etching apparatus a, a thin metal plate is used as a belt for conveying a wafer 1 shown in FIGS. 1(a) and 1(b). It should be noted that the belt 2 is coated with a synthetic resin film such as tear ay to prevent etching of the lower surface thereof.

しかるに、上記のような平帯状ベルト2を用い九場合、
上記ウェハー1の裏面が該ベルト2の上面に面接触する
ので該ウェハー裏面に対するエツチングが不可能となり
、そのため従来、上記ウェハー裏面の残膜を除去する後
工程な必費とした。
However, when using the flat belt 2 as described above,
Since the back surface of the wafer 1 is in surface contact with the top surface of the belt 2, it is impossible to etch the back surface of the wafer.Therefore, conventionally, a post-process to remove the remaining film on the back surface of the wafer has been required.

本発明はかかる点に鎌み、上記ウェハーを完全エツチン
グすることができる半導体乾式エツチング装置を提供す
ることを目的とし、その要旨は、互いに平行する態様で
巻掛けた被数本の線状体で搬送ベルトなII成した点に
ある。
The purpose of the present invention is to solve this problem and provide a semiconductor dry etching apparatus capable of completely etching the above-mentioned wafer. This is the point where the conveyor belt II has been completed.

以下、図示する実施例を参照しながら本発明を説明する
The present invention will be described below with reference to illustrated embodiments.

本発明に係ゐエツチング装置iFi、第28i4(A)
および(B)に平面形状および側面形状を各々示した搬
送ベルト3を用いている。このベルト3はブー9−4 
K11lけた複数本たとえば2本の無端融状体31から
なり、これらの線状体3.はそれらのなす間隔がウェハ
ー1の径よりも狭くなるように互い・に平行すIる態様
で張設されている。上記縁状体3、の材料としては、可
続性を有しかつエツチングされないものが使用され、こ
の実施例ではテフロン等の合成樹脂をその材料として用
いている。
Etching apparatus iFi according to the present invention, No. 28i4 (A)
A conveyor belt 3 whose planar shape and side surface shape are shown in FIG. 1 and (B) is used. This belt 3 is boo 9-4
Consisting of a plurality of K11l digits, for example two endless fused bodies 31, these linear bodies 3. are stretched parallel to each other so that the distance between them is narrower than the diameter of the wafer 1. The material used for the edge-shaped body 3 is a material that has continuity and is not etched, and in this embodiment, a synthetic resin such as Teflon is used as the material.

本発明に係るエツチング装置はかかる構成の搬送ベルト
3を備えているので、上記ウェハー1を搬送するさい絨
ウェハーの直面が上記−状体3iに線接触する。したが
って上記ウェハー1の裏面に対してもエツチングを施す
ことができる。なお、上記ウェハー裏面における線状体
31との接触部は、線部の両匈から入り込むガスによっ
てエツチングされるので、線部のエツチングをより完全
に行なうためには上記線状体3.の線径を可及的に小さ
くすることが好ましいが、評験の結果、1w以下に!l
径を設定すれば実用上充分でめった。
Since the etching apparatus according to the present invention is equipped with the conveyor belt 3 having such a structure, when the wafer 1 is conveyed, the face of the wafer comes into line contact with the -shaped body 3i. Therefore, etching can also be performed on the back surface of the wafer 1. Note that the contact portion of the back surface of the wafer with the linear body 31 is etched by the gas that enters from both sides of the line, so in order to more completely etch the line, the linear body 3. It is preferable to make the wire diameter as small as possible, but as a result of evaluation, it should be less than 1W! l
Setting the diameter was sufficient for practical use.

上記線状体3.の断面形状は、第3図(A)に示す円形
状の他、同図(B)に示す三角形状あるいは同図(C)
に示す四角形状など種々形をとりうるが、それらのうち
三角形状断面が最良でおる。なぜならその場合、線状体
3.がはは完全にウエノ・−1の裏面に線接触するから
である。
The linear body 3. In addition to the circular cross-sectional shape shown in Figure 3 (A), the cross-sectional shape of Figure 3 (B) is triangular, or the cross-sectional shape shown in Figure 3 (C) is
It can take various shapes such as the rectangular shape shown in the figure, but of these, a triangular cross section is the best. Because in that case, the linear body 3. This is because it is in complete line contact with the back side of Ueno-1.

第41絋上記線状体31O他の例を示す、こO線状体3
;は、その長手方向に溢って環状の央部3 M/を等間
隔で形成したものである。絡5図に示す如く、こO練状
体31′は、上記突部3畠′がウェハー10義伽に対し
点接触する。したがって線径が比較的大きい場合でろっ
ても、上記クエハー裏−状体31′は、上記突部3 a
 /を嵌入しうる凹溝41 を備えたプーリー4′を使
用することによって、その移動をより確実にしうるとい
う利点をもつ。
No. 41 This O linear body 3 showing another example of the above linear body 31O
; is formed by overflowing in the longitudinal direction and forming annular central portions 3M/ at equal intervals. As shown in FIG. 5, the protrusion 3' of the O-shaped body 31' makes point contact with the wafer 10. Therefore, even if the wire diameter is relatively large, the quefer back-shaped body 31'
The use of a pulley 4' having a recessed groove 41 into which a / can be fitted has the advantage that its movement can be made more reliable.

上記するように本発明に係る半導体乾式エツチング装置
は、線状体で構成し゛た搬送ベルトを備えているのでウ
ェハーの裏面をもエツチング処理することができ、した
がって従来必要とした上記ウェハー裏面に対する残膜処
理工程が不要になるという利点がめる。
As described above, since the semiconductor dry etching apparatus according to the present invention is equipped with a conveyor belt made of a linear body, the back side of the wafer can also be etched. This has the advantage of eliminating the need for a membrane treatment process.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のエツチング装置の搬送ベルトを概念的に
示したもので、同図(A)はその平面図、同図CB)は
その側面図、第2図は本発明に係るエツチング装置に使
用する搬送ベルトの一実施例な概念的に示したもので、
同図(A)はその平面図、同図(B)はその側面図、第
3図(A) 、  (B)および(C)は各々線状体の
断面形状を示した断面図、第4図は線状体の他のガを部
分的に示した廁視図、纂5図は第4図に示した線状体の
使用態様図。 2・・・・・・ウェハー 3・・・・・・搬送ベルト 3+ 、3:・・・線状体 3J1′・・・突部 4.4′・・・プーリー。 (7317)代理人 弁理士  則 近 憲 佑(ほか
1名) 凹 カミ0弓〈 只口 峙
Fig. 1 conceptually shows a conveyor belt of a conventional etching apparatus, in which (A) is a plan view thereof, CB) is a side view thereof, and Fig. 2 is a conveyor belt of an etching apparatus according to the present invention. This is a conceptual example of the conveyor belt used.
Figure 3 (A) is a plan view thereof, Figure 3 (B) is a side view thereof, Figures 3 (A), (B) and (C) are sectional views each showing the cross-sectional shape of the linear body, and Figure 4 The figure is a perspective view partially showing another part of the linear body, and FIG. 5 is a diagram of how the linear body shown in FIG. 4 is used. 2... Wafer 3... Conveyor belt 3+, 3:... Linear body 3J1'... Protrusion 4.4'... Pulley. (7317) Agent: Patent attorney Noriyuki Chika (and 1 other person) Kokokami 0yumi < Ichi Tadakuchi

Claims (1)

【特許請求の範囲】[Claims] 互いに平行する態様で巻掛けた複数本の線状体で搬送ベ
ルトを構成したことを特徴とする半導体乾式エツチング
装置。
A semiconductor dry etching apparatus characterized in that a conveyor belt is constituted by a plurality of linear bodies wound in parallel to each other.
JP14033081A 1981-09-08 1981-09-08 Semiconductor dry-type etching device Pending JPS5842235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14033081A JPS5842235A (en) 1981-09-08 1981-09-08 Semiconductor dry-type etching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14033081A JPS5842235A (en) 1981-09-08 1981-09-08 Semiconductor dry-type etching device

Publications (1)

Publication Number Publication Date
JPS5842235A true JPS5842235A (en) 1983-03-11

Family

ID=15266306

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14033081A Pending JPS5842235A (en) 1981-09-08 1981-09-08 Semiconductor dry-type etching device

Country Status (1)

Country Link
JP (1) JPS5842235A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7108803B1 (en) 1998-08-17 2006-09-19 Symrise Gmbh & Co. Kg Gas odorization method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56110235A (en) * 1980-02-06 1981-09-01 Mitsubishi Electric Corp Plasma etching device
JPS5643158B2 (en) * 1976-02-26 1981-10-09

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5643158B2 (en) * 1976-02-26 1981-10-09
JPS56110235A (en) * 1980-02-06 1981-09-01 Mitsubishi Electric Corp Plasma etching device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7108803B1 (en) 1998-08-17 2006-09-19 Symrise Gmbh & Co. Kg Gas odorization method

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