JPS5841580Y2 - Video control circuit for display equipment - Google Patents

Description

[Detailed description of the invention] The present invention relates to a video control circuit for a Rusk scan type display, and has a high-speed, high-precision color control function particularly suitable for use in color display devices that require a high-density graphic display function. The present invention relates to a video control circuit for a display device.

FIG. 1 shows a portion related to a video control circuit of a conventional display device.

In FIG. 1, 100 is a refresh memory, 200 is a character/pixel generation circuit, and 300 is a video control circuit.

Further, the video control circuit 300 includes a color control circuit 310 and a color control gate 320.

The refresh memory 100 is connected to an external information source (not shown).
One screen worth of display data written from is stored as a character code.

Character/pixel generation circuit 200 is refresh memory 100
A character or pixel video signal is generated by the character code from the computer and the scan line signal from a timing control circuit (not shown).

Bidet, HttlJ control circuit 300 is refresh memory 'J
100 (7) Output f character/pixel generation circuit 2
Controls the video signal V 1deo from 00.

The color control circuit 310 outputs color signals R, G, and B specifying the three primary colors of red, green, and blue, respectively, in accordance with the output of the refresh memory 100.

The color control gate 320 performs the logical product of the video signal Video from the character/pixel generation circuit 200 and the color signals R, G, and B from the color control circuit 310, and outputs 3 for each.
Color video signal RVideo GVi that supports primary colors
outputs deo and BVideo and provides display on the cathode ray tube.

The color signal R by such a color control gate 320
, G, B and the video signal Video to the cathode ray tube, due to component variations, temperature effects, power supply fluctuations, etc., as shown by the dotted line of the operating waveform in Figure 2, At the change point of the color signal,
Undesirable hazards occur in the video signal Vi-deo.

This buzzard is thin with a length of 10 to 30 ns.
Normal standard TV band (4MHz) amplifiers used in displays with 00 characters per screen cannot amplify the frequency, so it does not appear on the cathode ray tube screen and there is no problem, but with 3,000 characters or more In so-called high-density displays, the bandwidth of the video amplifier is 20 to 30 MHz.
Since the dots are displayed in 40 to 50 ns, an extra line of 0.5 to 1.0 dots is displayed on the screen, making it very unsightly.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the conventional circuits and provide a video control circuit suitable for high-density display without buzzing in the video signal.

In order to achieve this objective, the present invention selects circuit constants and elements so that the time difference between the color signal and the video signal is within one dot timing, and resynchronizes the two signals at each dot timing. This prevented the aforementioned buzzard from occurring.

FIG. 3 shows an embodiment of the present invention, showing a color control gate 320 and a video dot reproduction circuit 330, which is a characteristic feature of the present invention, added to the gate output stage.

In this embodiment, the video dot playback circuit 330 uses three edge-triggered D-type flip-flops of red, green, and blue.
They are provided corresponding to each color, and the R, G, and B output terminals of the color control gate 320 are connected to each D terminal, and a clock signal for generating video dot timing is applied to the T terminal.

By connecting in this way, even if the input signal of the D terminal has a buzzard that is close to the one-dot timing as shown in the shaded area in Figure 4, resynchronization is achieved with the dot timing of the T terminal, so the video dot Regeneration circuit 33
The output of 0 is not affected by the buzzard.

As described above, according to the present invention, it is possible to completely remove buzzards up to the width of one dot timing or less.
Display quality can be significantly improved.

It is clear that the video dot reproduction circuit 330 may be used in combination with gates and other flip-flops such as R-8 and J-R in addition to the D-type flip-flop to achieve the same function.

[Brief explanation of drawings]

Fig. 1 is a diagram showing a conventional video control circuit and related parts of a display device, Fig. 2 is an operational waveform diagram of the video control circuit shown in Fig. 1, and Fig. 3 is a color control circuit in the video control circuit according to the present invention. FIG. 4 is a diagram showing the portion where the video dot reproducing circuit is connected to the gate output stage, and is an operational waveform diagram of the embodiment of the present invention shown in FIG. Explanation of codes, 100...Refresh memory,
200...Character/Harm generating circuit, 300...
. . . video control circuit, 310 . . . color control circuit, 320 . . . color control gate, 330.
...Video dot playback circuit.

Claims (1)

[Scope of utility model registration request] At least a color control circuit for specifying a display color according to the output data of the refresh memory, and a color control circuit for calculating the AND of the output video signal of the character/pixel generation circuit and the output signal of the color control circuit. In the video control circuit comprising a control gate, the output stage of the color control gate is provided with a video dot playback circuit for temporarily storing the output of the gate and playing back and outputting it in synchronization with the dot timing of the video signal. A video control circuit for a display device, characterized in that: