JPS59218494A - Color crt display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a color CRT display device, and more particularly, to a color CRT display device that calculates the mixing ratio of the three primary colors red, green, and blue from a color table memory based on color data stored in an image memory. The present invention relates to a color CRT display device that reads out and displays color graphics on a CRT display.

Description of Prior Art FIG. 1 is a block diagram of the main parts of a color CRT display device which is the backbone of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of FIG. 1.

In FIG. 1, the C1 image memory 1 includes storage areas corresponding to each dot on one screen of a CRT display (not shown), and color data is stored in each storage area. Then, by sequentially applying lock pulses as shown in FIG. 2 within one horizontal scanning period, color data corresponding to each dot is read out. The read color 1c is latched into the register 2 at timing t1 of the leading edge of the clock pulse. The color data latched in register 2 is given to color table memory 3. Color table memory 3 is red, B.

A 4-bit multi-P14 tone color code is stored for each blue color, and when color data is latched into the C register 2, red corresponding to that color data is stored.

Outputs a 4-bit color code for each green and blue color.

Each red and green output from the color double memory 3.

The color hood for each blue is latched into the registers 4 to 6 at timing t2 of the leading edge of the next clock pulse and provided to a CRT display (not shown).

By the way, conventional CRT scanning has 250 pixels per dot.
Since it is about sec, it is sufficiently accessible even if a commercially available 10 memory is used as the color table memory 3. However, if you are trying to obtain high quality color figures,
It is necessary to increase the scanning speed of each dot on a CRT display. However, since the IC memory has a limited access time, increasing the scanning speed of each dot causes the problem that the color code output from the color table memory 3 becomes unstable and good color graphics cannot be displayed on the CRT. There was a point.

OBJECTS OF THE INVENTION Therefore, the main object of the present invention is to provide a color CRT display device that uses a conventional IC memory as a color table memory and can display stable color graphics even when the scanning speed of each dot is increased. It is.

Structure of the Invention To summarize the present invention, color data is sequentially read out from the image storage means in synchronization with a first clock pulse corresponding to each dot, and based on this color data, the first color data storage means is read out. From red to green.

Multi I4 to identify the three primary colors of blue! The /J plaude of iwIj is read in synchronization with a second clock pulse having a period twice that of the first clock pulse.

Further, the color code is read out from the second color code storage means in synchronization with the third clock pulse having a phase difference corresponding to the period of one dot with respect to the second clock pulse, and The color hood read from the color code storage means and the color code read from the second color code storage means are alternately output in synchronization with the first clock pulse.

The invention will be explained in more detail below along with embodiments shown in the drawings.

FIG. 3 is a block diagram of one embodiment of the present invention. First, the configuration will be explained with reference to FIG. The image memory 1 used as the image storage means is the same as that shown in FIG. 1 described above. The color data stored in the image memory 1 is read out in synchronization with the first clock pulse given from the clock pulse generation circuit 20. This first clock pulse has a period corresponding to each dot on the screen of the CRT display.

A first register 7, a color table memory 8 as a first color code storage means, registers 9 to 11 as a third register, a second register 15 and a second register
color table memory 16 as color code storage means and registers 17 to 19 as fourth registers.
correspond to the register 2, color table memory 3, and register 4 shown in FIG. 1 described above. Register 7 and registers 9 to 11 temporarily store color data or color codes in synchronization with the second clock pulse output from clock pulse generation circuit 20. This second clock pulse is selected to have a period twice that of the first clock pulse. Further, the other registers 15 and 17 to 19 temporarily store color data or color hood in synchronization with the third clock pulse. This third clock pulse
It has the same period as the 26th clock pulse, but its phase lags the 26th clock pulse by one dot period. Registers 9-11 and 17-19
The color hoods temporarily stored are provided to registers 12 to 14 as output means. These registers 1
2 to 14 temporarily store color codes output from registers 9 to 11 and registers 17 to 19, respectively, in synchronization with the first clock pulse, and output them alternately.

FIG. 4 is a waveform diagram of each part of FIG. 3.

Next, the specific operation of one embodiment of the present invention will be described with reference to FIGS. 33 and 4. The image memory 1 receives a first clock pulse (CP) as shown in FIG. 4(a).
The color data A shown in FIG.
As shown in FIG. 4(C), the pulse has a period twice that of one WSl pulse, and at the timing of its leading edge, the register 7 stores color data A@ as shown in FIG. 4(e). . At this point, the third clock pulse applied to the other register 15 is delayed in phase by a period corresponding to one dot than the second clock pulse, as shown in the fourth (d), so that the color data is I don't remember A. The color data B is then read out from the image memory 1 at the second leading edge of the first clock pulse, and the color data B is read out from the image memory 1 by the register 15 at the leading edge of the third clock pulse, as shown in FIG. temporarily memorize. One color table memory 8 reads out a multi-gradation color code a of red, green, and blue corresponding to the color data A stored in the register 7.

Similarly, when color data B is stored in the register 15 of the other color data table memory 16, a color code storage means corresponding to the color data is stored. And 3
At the leading edge of the first clock pulse, the image memory 1 reads out the color data C. At this time, at the leading edge of the second clock pulse, the registers 9 to 11 read out the color data C.
The color code a corresponding to the color data A that has been read out from step 8 is latched. Therefore, color code a wrapped in registers 9 to 11 is stored in register 12.
It is given from 1 to 14. And register 1.・2 to 14 latch and output color code a at the leading edge of the first clock pulse.

Note that at the leading edge of the second clock pulse, the register 7 stores the color data C read out from the image memory 1. At the leading edge of the fourth pulse of the first clock pulse, the color data D is read from the image memory 1, and at the leading edge of the third clock pulse, the color data D is read from the color table memory 16. Latch code b. The color code b is then stored in registers 12-14 and output at the leading edge of the first clock pulse. However, registers 12 to 14 are as shown in FIG.
As shown in 1), the color code a output from the color table memory 8 is output in synchronization with the first clock pulse, and the color code a is read out from the color table memory 16 in synchronization with the next first clock pulse. Code b will be output. Note that at the leading edge of the third clock pulse, the register 15 stores the color data D read out from the image memory 1. Then, the color code d corresponding to the color data D is read out from the color table memory 16 and latched into the registers 17 to 19 at the timing of the next leading edge of the second clock pulse.

In this way, the color codes read from the first color table memory 8 and the second color table memory 16 are stored in registers 9 to 11 and 17 to 19.
The signals are temporarily stored in the registers 12 to 14 via the dots, and can be output alternately in synchronization with the first clock pulses corresponding to the dots on the screen.

Effects of the Invention As described above, according to the present invention, the second and third clock pulses applied to the Uml and second color code storage means have a period twice that of the first clock pulse applied to the image storage means. Therefore, even if the frequency of the dots on both screens of the CRTR screen is increased, it can be accessed sufficiently even if conventional IC memory is used as a color code storage means, and high-quality color graphics can be displayed on the CRTR display. be able to.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the main parts of a conventional color CRT display device. FIG. 2 is a waveform diagram for explaining the operation of FIG. 1. FIG. 3 is a block diagram of one embodiment of the present invention. FIG. 4 is a waveform diagram of each part of FIG. 3. In the figure, 1 is the image memory, 7 is the first register, and 8 is the image memory.
is the first color table memory, 9 to 11 are the third registers, 12 to 14 are the output side registers, 15 is the second register, 16 is the second color table memory,
17 to 19 are fourth registers, and 20 is a clock pulse generation circuit. Patent applicant Daikin Industries, Ltd.

Claims (3)

[Claims] (1) In a color CRT display device that displays color figures as a plurality of dots on a CR7 screen, a first clock pulse corresponding to the period of each dot, and a period of 2 to 2 with respect to the period of the first clock pulse. a second clock pulse having a period twice that of the first clock pulse; and a phase difference having a period twice that of the first clock pulse and corresponding to a period of one dot with respect to the second clock pulse. a clock pulse generating means for generating a third clock pulse having a memory area corresponding to all dots on the CRT screen;
An image storage means for storing color data of a figure to be displayed thereon and sequentially outputting the color data dot by dot in response to the first clock pulse; and a multi-gradation color hood for the three primary colors of red, green and blue. a first color code storage means for storing in advance a color code corresponding to the color data read out from the image storage means in synchronization with the second clock pulse; a second color code storage means for reading out a color hood corresponding to the color data read out from the image storage means in synchronization with the third clock pulse; 1. A color CRT display device, comprising output means for alternately outputting each color hood outputted from the color code storage means of 1142 in synchronization with the first clock pulse. (2) The first color code storage means includes a first register that temporarily stores the read color data in synchronization with the second clock pulse; 2. The color CRT display device according to claim 1, further comprising a second register for temporarily storing read color data in synchronization with the third clock pulse. (3) A third register for temporarily storing the color code read from the first color code storage means in synchronization with the second clock pulse; 2. The color CRT display device of claim 1, further comprising a fourth register for temporarily storing a color code in synchronization with said third clock pulse.