JPS5840925U - gain control circuit - Google Patents
gain control circuitInfo
- Publication number
- JPS5840925U JPS5840925U JP13419181U JP13419181U JPS5840925U JP S5840925 U JPS5840925 U JP S5840925U JP 13419181 U JP13419181 U JP 13419181U JP 13419181 U JP13419181 U JP 13419181U JP S5840925 U JPS5840925 U JP S5840925U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- gain
- control circuit
- gain control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の音声回路の構成を示すブロック図、第２
図は減衰器の制御電圧に対する利得（減衰）特性を示す
特性図、第３図は本考案の利得制御回路を付加した音声
回路を示すブロック図、第４図は入力信号と゛利得制御
回路から出力される信号を示す波形図、第５図は本考案
の具体的回路を示す回路図である。
１・・・音声検波回路、３・・・減衰器、４・・・滞部
コントロール回路、７・・・バッファ、８・・・増幅回
路、９・・・判別回路、１１．’ １８． ２３・・
・トランジスタ、２７・・・ダイオード、２８・・・抵
抗、２９・・・コンデンサ。Figure 1 is a block diagram showing the configuration of a conventional audio circuit;
The figure is a characteristic diagram showing the gain (attenuation) characteristics with respect to the control voltage of the attenuator, Figure 3 is a block diagram showing the audio circuit to which the gain control circuit of the present invention is added, and Figure 4 is the input signal and the output from the gain control circuit. FIG. 5 is a circuit diagram showing a specific circuit of the present invention. DESCRIPTION OF SYMBOLS 1...Audio detection circuit, 3...Attenuator, 4...Holder control circuit, 7...Buffer, 8...Amplification circuit, 9...Discrimination circuit, 11. '18. 23...
・Transistor, 27...Diode, 28...Resistor, 29...Capacitor.
Claims (1)
レベルにより利得が可変制御される減衰器を通して音声
等を再生する回路において、前記信号を取り込み、この
信号レベルが所定値以上であるか否かを判別し、この判
別した結果に応じた出力を前記制御端に供給する手段を
設けることにより、入力される信号に応じて上記回路の
利得を制御することを特徴とする利得制御回路。In a circuit that reproduces an input audio signal or the like through an attenuator whose gain is variably controlled by the applied level supplied to a control terminal, the circuit takes in the signal and checks whether the signal level is above a predetermined value or not. A gain control circuit characterized in that the gain of the circuit is controlled in accordance with an input signal by providing means for determining whether or not the signal is present and supplying an output corresponding to the determined result to the control terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13419181U JPS5840925U (en) | 1981-09-11 | 1981-09-11 | gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13419181U JPS5840925U (en) | 1981-09-11 | 1981-09-11 | gain control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5840925U true JPS5840925U (en) | 1983-03-17 |
Family
ID=29927624
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13419181U Pending JPS5840925U (en) | 1981-09-11 | 1981-09-11 | gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5840925U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60108245U (en) * | 1983-12-28 | 1985-07-23 | デルタ工業株式会社 | Automotive seat frame |
| JPS60108246U (en) * | 1983-12-28 | 1985-07-23 | デルタ工業株式会社 | Automotive seat frame |
-
1981
- 1981-09-11 JP JP13419181U patent/JPS5840925U/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60108245U (en) * | 1983-12-28 | 1985-07-23 | デルタ工業株式会社 | Automotive seat frame |
| JPS60108246U (en) * | 1983-12-28 | 1985-07-23 | デルタ工業株式会社 | Automotive seat frame |
| JPH023327Y2 (en) * | 1983-12-28 | 1990-01-25 | ||
| JPH023328Y2 (en) * | 1983-12-28 | 1990-01-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5840925U (en) | gain control circuit | |
| JPS5933319U (en) | automatic gain control circuit | |
| JPS5819545U (en) | Automatic transmission output control circuit | |
| JPS599619U (en) | amplifier circuit | |
| JPS5866709U (en) | Stabilized oscillation circuit | |
| JPS6059617U (en) | Mixing level automatic variable circuit | |
| JPS6147532U (en) | Noise signal suppression circuit | |
| JPS59164323U (en) | Amplifier volume control circuit | |
| JPS59154962U (en) | level compression circuit | |
| JPS58132420U (en) | noise reduction circuit | |
| JPS59132219U (en) | automatic gain control circuit | |
| JPS60177507U (en) | Variable idle current power amplifier | |
| JPS5974512U (en) | recording level adjuster | |
| JPS58166121U (en) | Output limiting circuit for power amplifier circuit | |
| JPS6017019U (en) | volume control circuit | |
| JPS6079824U (en) | Automatic volume control circuit for radio equipment | |
| JPS60150814U (en) | AGC circuit | |
| JPS58132410U (en) | rear equalizer circuit | |
| JPS6093162U (en) | Automatic recording level adjuster for tape recorder | |
| JPS5883823U (en) | audio default device | |
| JPS6093163U (en) | Dropout compensation circuit | |
| JPS59164945U (en) | tape recorder | |
| JPS5911512U (en) | Signal level adjustment circuit | |
| JPS58530U (en) | AM receiver muting device | |
| JPS588268U (en) | Input level limit circuit |