JPS6059617U - Mixing level automatic variable circuit - Google Patents

Mixing level automatic variable circuit

Info

Publication number
JPS6059617U
JPS6059617U JP15129383U JP15129383U JPS6059617U JP S6059617 U JPS6059617 U JP S6059617U JP 15129383 U JP15129383 U JP 15129383U JP 15129383 U JP15129383 U JP 15129383U JP S6059617 U JPS6059617 U JP S6059617U
Authority
JP
Japan
Prior art keywords
level
variable circuit
mixing
level automatic
automatic variable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15129383U
Other languages
Japanese (ja)
Inventor
小松　弘二
Original Assignee
パイオニア株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パイオニア株式会社 filed Critical パイオニア株式会社
Priority to JP15129383U priority Critical patent/JPS6059617U/en
Publication of JPS6059617U publication Critical patent/JPS6059617U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来のミキシング回路構成を示すブロック図、
第２図はソース系信号レベルとＭＩＣ出力信号レベル関
係を示すグラフ、第３図は本考案の一実施例を示すブロ
ック図、第４図はそのソース系信号レベルとＭＩＣ出力
信号レベルの関係を示すグラフである。 １．２・・・出力アンプ、３・・・ミキシングアンプ、
４、５．６・・・固定抵抗、１１．１２・・・出力アン
プ、１３・・・ミキシングアンプ、１７．１８・・・Ａ
ＬＣ回路、１９・・・検波回路、Ｒ１−Ｒ３・・・抵抗
、Ｔｒｌ、Ｔｒ２・・・トランジスタ。Figure 1 is a block diagram showing the configuration of a conventional mixing circuit.
Fig. 2 is a graph showing the relationship between the source signal level and the MIC output signal level, Fig. 3 is a block diagram showing an embodiment of the present invention, and Fig. 4 is a graph showing the relationship between the source signal level and the MIC output signal level. This is a graph showing. 1.2... Output amplifier, 3... Mixing amplifier,
4, 5.6...Fixed resistance, 11.12...Output amplifier, 13...Mixing amplifier, 17.18...A
LC circuit, 19...Detection circuit, R1-R3...Resistor, Trl, Tr2...Transistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ′　　サウンド信号の出力アンプおよびマイクからの音
声信号の出力アンプを自動レベル制御回路を介してミキ
シングアンプに接続してなり、上記自動レベル制御回路
は、音声信号が設定値以上の時、サウンド信号のレベル
を降下するようにレベル制御する構成になっていること
を特徴とするミキシングレベルの自動可変回路。' A sound signal output amplifier and an audio signal output amplifier from a microphone are connected to a mixing amplifier via an automatic level control circuit, and when the audio signal exceeds a set value, the automatic level control circuit An automatic mixing level variable circuit characterized in that the mixing level is configured to control the level so as to decrease the level.
JP15129383U 1983-09-29 1983-09-29 Mixing level automatic variable circuit Pending JPS6059617U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15129383U JPS6059617U (en) 1983-09-29 1983-09-29 Mixing level automatic variable circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15129383U JPS6059617U (en) 1983-09-29 1983-09-29 Mixing level automatic variable circuit

Publications (1)

Publication Number Publication Date
JPS6059617U true JPS6059617U (en) 1985-04-25

Family

ID=30335307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15129383U Pending JPS6059617U (en) 1983-09-29 1983-09-29 Mixing level automatic variable circuit

Country Status (1)

Country Link
JP (1) JPS6059617U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940460A (en) * 1972-08-22 1974-04-16

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4940460A (en) * 1972-08-22 1974-04-16

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