JPS58132420U - noise reduction circuit - Google Patents

noise reduction circuit

Info

Publication number
JPS58132420U
JPS58132420U JP2952082U JP2952082U JPS58132420U JP S58132420 U JPS58132420 U JP S58132420U JP 2952082 U JP2952082 U JP 2952082U JP 2952082 U JP2952082 U JP 2952082U JP S58132420 U JPS58132420 U JP S58132420U
Authority
JP
Japan
Prior art keywords
noise reduction
reduction circuit
amplifier
compression
output signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2952082U
Other languages
Japanese (ja)
Inventor
崇 志賀
Original Assignee
日本ビクター株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本ビクター株式会社 filed Critical 日本ビクター株式会社
Priority to JP2952082U priority Critical patent/JPS58132420U/en
Publication of JPS58132420U publication Critical patent/JPS58132420U/en
Pending legal-status Critical Current

Links

Landscapes

  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はノイズ低減回路の入出力特性を示す特性曲線図
、第2図はドルビーICを用いた従来のノイズ低減回路
のブロック図、第3図はこの考案の一実施例を示すノイ
ズ低減回路のブロック図である。 10・・・・・・増幅器、20・・・・・・圧縮・伸張
回路、20a・・・・・・制御入力端子、C・・・・・
・コンデンサ。
Figure 1 is a characteristic curve diagram showing the input/output characteristics of a noise reduction circuit, Figure 2 is a block diagram of a conventional noise reduction circuit using Dolby IC, and Figure 3 is a noise reduction circuit showing an embodiment of this invention. FIG. 10...Amplifier, 20...Compression/expansion circuit, 20a...Control input terminal, C...
・Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 利得一定の増幅器と圧縮・伸張回路とよりなるICを用
いたノイズ低減回路において、出力信号の基準レベルを
IC個有の基準レベルより低い値に設定するとともに、
この出力信号を上記増幅器を介して圧縮・伸張回路の制
御入力端子に印加するようにしたノイズ低減回路。
In a noise reduction circuit using an IC consisting of an amplifier with a constant gain and a compression/expansion circuit, the reference level of the output signal is set to a value lower than the reference level unique to the IC, and
A noise reduction circuit that applies this output signal to a control input terminal of a compression/expansion circuit via the amplifier.
JP2952082U 1982-03-02 1982-03-02 noise reduction circuit Pending JPS58132420U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2952082U JPS58132420U (en) 1982-03-02 1982-03-02 noise reduction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2952082U JPS58132420U (en) 1982-03-02 1982-03-02 noise reduction circuit

Publications (1)

Publication Number Publication Date
JPS58132420U true JPS58132420U (en) 1983-09-07

Family

ID=30041308

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2952082U Pending JPS58132420U (en) 1982-03-02 1982-03-02 noise reduction circuit

Country Status (1)

Country Link
JP (1) JPS58132420U (en)

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