JPS5834736U - semiconductor wafer - Google Patents
semiconductor waferInfo
- Publication number
- JPS5834736U JPS5834736U JP13042381U JP13042381U JPS5834736U JP S5834736 U JPS5834736 U JP S5834736U JP 13042381 U JP13042381 U JP 13042381U JP 13042381 U JP13042381 U JP 13042381U JP S5834736 U JPS5834736 U JP S5834736U
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- adhesive surface
- metal layer
- solder
- junction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dicing (AREA)
- Die Bonding (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は、半導体ウェーハの平面図、第２図は、ウェー
ハをペレット化するブレーキング概念構成図、第３図は
、個々のペレットの斜視図、第４図は、ウェーハの概略
断面図、第５図は、この考案の一実施例を示すパワート
ランジスタ・ウェーハの断面図、第６図乃至第８図はそ
の金属層を設ける手法を示す各工程の要部断面図である
。
１４．１４・・・・・・素子（パワ−トランジスタ）、
２０．２０・・・・・・区画境界帯域、２２・・・・・
・固着面、２３・・・・・・露出部、２４．２４・曲・
金属層、２５゜２５・・・・・・予備半田。FIG. 1 is a plan view of a semiconductor wafer, FIG. 2 is a conceptual block diagram of breaking to pelletize the wafer, FIG. 3 is a perspective view of each pellet, and FIG. 4 is a schematic cross-sectional view of the wafer. FIG. 5 is a sectional view of a power transistor wafer showing an embodiment of this invention, and FIGS. 6 to 8 are sectional views of essential parts of each step showing a method of providing the metal layer. 14.14... Element (power transistor),
20.20... Division boundary band, 22...
・Fixed surface, 23...Exposed part, 24.24・Curve・
Metal layer, 25°25...Preliminary solder.
Claims (1)
る際に基板に固着する固着面に予備半田を付着させるも
のにおいて、前記固着面上の各素子区画境界帯域以外に
、オーミック接触月並予備半田付着性良好な金属層を設
けたことを特徴とする半導体ウェーハ。In a method in which a PN junction is made, a large number of elements are formed, and preliminary solder is attached to the adhesive surface that is fixed to the substrate when dividing into each element, there is an ohmic contact surface in addition to the boundary zone of each element section on the adhesive surface. A semiconductor wafer characterized by being provided with a metal layer having good pre-solder adhesion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13042381U JPS5834736U (en) | 1981-08-31 | 1981-08-31 | semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13042381U JPS5834736U (en) | 1981-08-31 | 1981-08-31 | semiconductor wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5834736U true JPS5834736U (en) | 1983-03-07 |
Family
ID=29924051
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13042381U Pending JPS5834736U (en) | 1981-08-31 | 1981-08-31 | semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5834736U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03234043A (en) * | 1990-02-09 | 1991-10-18 | Rohm Co Ltd | Manufacture of semiconductor device |
-
1981
- 1981-08-31 JP JP13042381U patent/JPS5834736U/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03234043A (en) * | 1990-02-09 | 1991-10-18 | Rohm Co Ltd | Manufacture of semiconductor device |
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