JPS5832446A - シリサイドの形成方法 - Google Patents

シリサイドの形成方法

Info

Publication number
JPS5832446A
JPS5832446A JP56130964A JP13096481A JPS5832446A JP S5832446 A JPS5832446 A JP S5832446A JP 56130964 A JP56130964 A JP 56130964A JP 13096481 A JP13096481 A JP 13096481A JP S5832446 A JPS5832446 A JP S5832446A
Authority
JP
Japan
Prior art keywords
silicide
melting point
polycrystalline silicon
point metal
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56130964A
Other languages
English (en)
Japanese (ja)
Other versions
JPH025298B2 (enrdf_load_stackoverflow
Inventor
Nobuyasu Taino
田井野 伸泰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP56130964A priority Critical patent/JPS5832446A/ja
Publication of JPS5832446A publication Critical patent/JPS5832446A/ja
Publication of JPH025298B2 publication Critical patent/JPH025298B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP56130964A 1981-08-20 1981-08-20 シリサイドの形成方法 Granted JPS5832446A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56130964A JPS5832446A (ja) 1981-08-20 1981-08-20 シリサイドの形成方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56130964A JPS5832446A (ja) 1981-08-20 1981-08-20 シリサイドの形成方法

Publications (2)

Publication Number Publication Date
JPS5832446A true JPS5832446A (ja) 1983-02-25
JPH025298B2 JPH025298B2 (enrdf_load_stackoverflow) 1990-02-01

Family

ID=15046735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56130964A Granted JPS5832446A (ja) 1981-08-20 1981-08-20 シリサイドの形成方法

Country Status (1)

Country Link
JP (1) JPS5832446A (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5013686A (en) * 1987-09-30 1991-05-07 Samsung Electronics Co., Ltd. Method of making semiconductor devices having ohmic contact
US6323528B1 (en) 1991-03-06 2001-11-27 Semiconductor Energy Laboratory Co,. Ltd. Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5013686A (en) * 1987-09-30 1991-05-07 Samsung Electronics Co., Ltd. Method of making semiconductor devices having ohmic contact
US6323528B1 (en) 1991-03-06 2001-11-27 Semiconductor Energy Laboratory Co,. Ltd. Semiconductor device

Also Published As

Publication number Publication date
JPH025298B2 (enrdf_load_stackoverflow) 1990-02-01

Similar Documents

Publication Publication Date Title
DE69504252T2 (de) Flache Grabenisolation mit dünner Nitridauskleidung
JPH04299566A (ja) 高抵抗用多結晶シリコンの抵抗値維持方法
DE69028397T2 (de) Verfahren zur herstellung einer halbleitervorrichtung
JPH02219223A (ja) 半導体装置の製造方法
DE3613215A1 (de) Verfahren zur herstellung eines halbleitersubstrats
DE3525550A1 (de) Verfahren zur herstellung von feldeffekttransistoren mit isoliertem gate und hoher ansprechgeschwindigkeit in integrierten schaltungen hoher dichte
JPS5832446A (ja) シリサイドの形成方法
JPH03205830A (ja) 半導体装置及び多結晶ゲルマニウムの製造方法
JPS63316477A (ja) 半導体装置およびその製造方法
JPS60127755A (ja) 半導体装置の製法
JPS63229744A (ja) 半導体装置
JPH01239940A (ja) 半導体装置
JPH02296362A (ja) 半導体装置の製造方法
JPH0536911A (ja) 3次元回路素子およびその製造方法
Shimamoto et al. Proposal and experimental study of a high‐precision polycrystalline‐silicon film resistor with a quasi‐double‐layer structure
JPH01191446A (ja) 半導体装置の製造方法
JPS62263655A (ja) 半導体装置の製造方法
JPS63292663A (ja) 半導体装置の製造方法
DE68926616T2 (de) Schwerschmelzende Metallsilicid-Verkapselung, zum Schutz mehrlagiger Policide
JPS61127158A (ja) 半導体装置の製造方法
JPS6177343A (ja) 半導体装置の製造方法
JPH0444229A (ja) 半導体集積回路の製造方法
JPH06140215A (ja) 薄膜抵抗体とそれを内蔵した多層回路基板の製造方法
JPS62295444A (ja) 半導体素子の製造方法
DD205304A1 (de) Halbleiterspeicherelement und verfahren zu seiner herstellung