JPS5830341U - PLL circuit - Google Patents
PLL circuitInfo
- Publication number
- JPS5830341U JPS5830341U JP12564881U JP12564881U JPS5830341U JP S5830341 U JPS5830341 U JP S5830341U JP 12564881 U JP12564881 U JP 12564881U JP 12564881 U JP12564881 U JP 12564881U JP S5830341 U JPS5830341 U JP S5830341U
- Authority
- JP
- Japan
- Prior art keywords
- pll circuit
- output
- vco
- input
- local oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案に係るＰＬＬ回路のブロック図、第２図
は第１図による変調特性図、第３図ａ、 ｂはそれぞれ
レベル調整器の回路図例、第４図は従来のＰＬＬ回路の
ブロック図、第５図は第４図による変調特性図である。
１・・・レベル調整器、２・・・局部発振器、３・・・
ｖｃｏ、 ４・・・可変抵抗器、５・・・位相検波器。Figure 1 is a block diagram of a PLL circuit according to the present invention, Figure 2 is a modulation characteristic diagram according to Figure 1, Figures 3a and b are examples of circuit diagrams of level adjusters, and Figure 4 is a conventional PLL circuit. FIG. 5 is a modulation characteristic diagram according to FIG. 4. 1...Level adjuster, 2...Local oscillator, 3...
vco, 4... variable resistor, 5... phase detector.
Claims (1)
のと、基準発振器の出力とを位相検波し、この位相検波
出力をＶＣＯに帰還する方式のＰＬＬ回路において、ｖ
ＣＯに入力する変調信号をレベル調整器を介して局部発
振器に同時入力し、位相検波器の入力信号がＶＣＯの変
調信号による変調成分を含まないようにしたことを特徴
とするＰＬＬ回路。In a PLL circuit that performs phase detection on a mixture of a part of the output of the VCO and the output of the local oscillator and the output of the reference oscillator, and feeds back this phase detection output to the VCO,
A PLL circuit characterized in that a modulation signal input to a CO is simultaneously input to a local oscillator via a level adjuster so that an input signal to a phase detector does not include a modulation component due to a modulation signal of a VCO.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12564881U JPS5830341U (en) | 1981-08-24 | 1981-08-24 | PLL circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12564881U JPS5830341U (en) | 1981-08-24 | 1981-08-24 | PLL circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5830341U true JPS5830341U (en) | 1983-02-28 |
| JPS6238325Y2 JPS6238325Y2 (en) | 1987-09-30 |
Family
ID=29919478
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12564881U Granted JPS5830341U (en) | 1981-08-24 | 1981-08-24 | PLL circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5830341U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3025799U (en) * | 1995-12-14 | 1996-06-25 | 株式会社セイコウ工業 | Vibration calling device for mobile phones |
-
1981
- 1981-08-24 JP JP12564881U patent/JPS5830341U/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3025799U (en) * | 1995-12-14 | 1996-06-25 | 株式会社セイコウ工業 | Vibration calling device for mobile phones |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6238325Y2 (en) | 1987-09-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5830341U (en) | PLL circuit | |
| JPS6114578U (en) | color synchronization circuit | |
| JPS60149229U (en) | FM demodulation circuit | |
| JPS59127318U (en) | phase control circuit | |
| JPS5811342U (en) | Phase-locked frequency synthesizer | |
| JPS5848145U (en) | phase synchronized circuit | |
| JPS6032838U (en) | PLL circuit | |
| JPS6068742U (en) | automatic frequency control circuit | |
| JPS59147344U (en) | Receiving machine | |
| JPS6019238U (en) | FM signal generator | |
| JPS58503U (en) | Synchronous detection circuit | |
| JPS5917654U (en) | superheterodyne receiver | |
| JPS5850534U (en) | PLL circuit | |
| JPS6118658U (en) | Synchronous detection circuit | |
| JPS6047357U (en) | Clock generation circuit | |
| JPS59171426U (en) | FM receiver | |
| JPS5849285U (en) | timer clock circuit | |
| JPS587217U (en) | Master clock generation circuit | |
| JPS58144929U (en) | PLL synthesizer tuner | |
| JPS59104636U (en) | frequency synthesizer | |
| JPS5891173U (en) | Peak level detection circuit | |
| JPS60103949U (en) | frequency synthesizer | |
| JPS5920765U (en) | Video synchronous detection device | |
| JPS58123635U (en) | Receiving machine | |
| JPS6043022U (en) | automatic tuning receiver |