JPS5827538Y2 - Complementary push-pull amplifier - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to a complementary push-pull amplifier using complementary transistors, and particularly relates to an amplifier that improves the S/N ratio and distortion rate and enhances bias stability.

FIG. 1 shows a bias circuit conventionally generally employed in complementary push-pull amplifiers.

This bias circuit has an operating power supply +EB. A bias power supply +Ec is applied to the bases of complementary transistors T, 1 (for example, NPN type), and Tr2 (for example, PNP type), which are push-pull connected between =EB and EB.

In addition to connecting EC, each transistor Tr1゜Tr
In order to improve the stability of the collector current with respect to ambient temperature at the two operating points, both transistors Tr1. A stabilizing resistor R81°Re2 is inserted in the emitter circuit of Tr2.

However, in such a conventional bias circuit, the stabilizing resistor Rc1. As a result of inserting Re2, this resistance Re1, R
62 has an effect similar to the increase in rbb of the transistors Tr□, Tr2 themselves, thereby increasing the resistor Re1.62 for small signals. Due to the thermal noise generated by Re2, the amplifier's S/
N is getting worse and I have to give up.

In view of the above-mentioned drawbacks, this device stabilizes the bias current of the transistor against changes in external conditions such as ambient temperature without inserting a stabilizing resistor into the emitter of the transistor by devising a biasing configuration. At the same time, it prevents S/N deterioration due to thermal noise of the stabilizing resistor, and also easily generates secondary distortion due to the asymmetry of a pair of complementary transistors connected in push-pull without deteriorating S/N. The purpose of the present invention is to provide a complementary push-pull amplifier that can prevent such problems.

The characteristics of the amplifier according to this invention are that each emitter circuit of a pair of push-pull connected complementary transistors is directly grounded, and a load resistor is connected in series to each collector circuit, and these resistors are used to connect each of the above transistors. The structure is configured to drop a considerable portion of the voltage of the operating power supply applied to the transistor, and divide the voltage applied between the emitter and collector of each of the switched transistors to obtain a base-emitter bias voltage of each of the transistors. The present invention is characterized in that at least one of the load resistors is a variable resistor to compensate for the symmetry of operation of the transistors.

This invention will be explained in detail below based on the drawings.

FIG. 2 shows the principle of the amplifier according to this invention.

A pair of complementary transistors Tr connected in a push-pull manner
□, Tr2 and midpoint grounding positive polarity, negative polarity operating power supply +E
Resistors R1 and R2 are inserted in series between B and -EB.

However, in order to make the potentials and currents of each part of both transistors Tr□ and Tr2 symmetrical, the resistors R1 and R2 are generally determined to have the same resistance value.

Both transistors Tr1. Resistors R3, R4, R between Tr2
5 series circuits (voltage dividers) are connected in parallel, and this voltage divider supplies a bias voltage between the base and emitter of both transistors Tr2.

Generally, the current flowing through the voltage divider is set to a value sufficiently larger than the base current values of both transistors Tr□ and Tr2.

The resistance values of the resistors R1 and R2 are set so that the current flowing through the resistors causes a voltage drop corresponding to the operating power supply +EB, -EBO. Resistance R□.

This will be explained by giving specific resistance values to R2t, R3t, R4t, and R5.

Now, set resistors R1 and R2 to 5, 2. Resistors R3 and R5 are set to 2 and Q, and resistance R4 is set to 4 and β.

Transistor Tr0. If the base-emitter voltages of Tr2 are each 0.6 V, then the voltage 2 across resistor R4 will be 1.2 V.

Since the currents flowing through the resistors R3, R4 and R5 can be considered to be the same, the voltage between the resistors R3 and R5 1. v3/ri are each 0.6V.

Then, the voltages of the operating power supplies +EB and -EB are each +3
If the voltages are 0V and -30V, the transistor Tr1. Tr3
The collector current is U60V2.4V/IOK,Q.

For this reason, due to fluctuations in ambient temperature, etc., the transistor T
r1. The forward voltage between the base and emitter of Tr2 changes, so even if the voltage (V1+v2+3) changes somewhat, the transistor Tr0. It is understood that the collector current of Tr3 is maintained at a substantially constant value determined by the operating power supply voltage and resistors R1 and R2.

In addition, in this example, due to the resistances R, , R2,
Although a voltage drop of 57.6V (60V-2.4V) is caused, the transistor Tr1. Tr3 base
If it is necessary to increase the voltage between the collectors to 0.6V or higher, reduce the resistance values of resistors R1 and R2 and increase the resistance of resistor R3t R
The resistance value of 42R5 may be changed appropriately.

It goes without saying that the greater the voltage drop caused by the resistor R1tR2, the better the stability against temperature changes and the like.

In this way, according to this amplifier, the collector current value of the transistor in the amplifier is extremely stable against fluctuations in ambient temperature, etc., and the S/N ratio is improved because no stabilizing resistor is inserted in the emitter circuit of the transistor. Ru.

In addition, as mentioned above, the amplifier of this invention compensates for the asymmetry of each transistor by adjusting the collector current of each transistor except for the emitter circuit of a pair of push-pull connected transistors, thereby generating secondary distortion. Means are provided to prevent this.

As this means, for example, in FIG. 2, resistors R1,
Either one or both of R2 is a variable resistor (
(Of course, a combination of a fixed resistor and a variable resistor may be used), one or both of the operating power supplies +EB and -EB may be a variable voltage source, or one or both of the bias circuit resistors R3t and R5 may be a variable resistor. .

Each transistor Tr1.
By adjusting the collector current of Tr2, the gains of both transistors Tr1 and Tr2 can be matched to eliminate second-order distortion.

Moreover, since such adjustment means is provided outside the emitter circuit, the S/N ratio does not deteriorate.

An embodiment of a common emitter type amplifier to which this invention is applied will be described below.

Note that, hereinafter, equivalent parts will be explained using the same reference numerals throughout each embodiment.

FIG. 3 shows an embodiment of this invention, in which PNP type and N
The emitters of the PN type transistors Tr□lj T l-1° are commonly connected to ground, and the collectors are connected to the positive and negative operating power supply +EB with the center point grounded via the variable resistor vR1□ and resistor R12, respectively.

- Connected to EB.

The variable resistor ■R1 corresponds to the resistor R1 in FIG. 2, and the variable resistor vR1 is used as the collector current adjusting means described above.

The resistor R12 (corresponds to the resistor R2 in FIG. 2).

The voltage between the collector and emitter of transistors Tr1□ and Tr12 is determined by resistors R13, R14 and resistor R15J.
R16 divides the voltage between both transistors Tr10. T
It is applied to the base of r□2.

Both transistors Tr10. The base of the Tr12 is connected to the common input terminal IN via capacitors C13 and C14, and is grounded via the input terminal INH resistor R18.

The output terminal OUT is drawn out from the collectors of both transistors Tr1□ and Tr1° via a capacitor C117C12, and is grounded via a resistor R17.

In this embodiment, each transistor Tr11, Tr12
(7) In terms of stabilizing the bias current, it is clear that this circuit is equivalent to the circuit principle described above (FIG. 2).

Transistor Trll (7
) By adjusting the collector current, the gains of both transistors Tr□□ and Tr□2 are matched, and both transistors Tr11. The occurrence of second-order distortion due to the asymmetry of Tr□2 can be minimized.

FIG. 4 shows a modification of the embodiment shown in FIG. 3.

That is, the configuration is such that the output signal is negatively fed back to the base side of Tr 7, Tr 11, and Tr 1-12 via resistor R□, and other than this, it is the same as that of FIG. 3.

FIG. 5 shows that both transistors Tr□□2. An embodiment is shown in which the collector current of Tr12 can be adjusted at the same time.

That is, both transistors Tr 11 j 'rr12
The emitters of the transistors Tr□1. The collectors of Tr□2 are connected through a resistor R2□.

A potentiometer vR2° is connected in parallel with the resistor R, and the sliding terminal of the potentiometer VR2° is grounded.

Therefore, if the sliding terminal of the potentiometer VR22 is slid from the middle point toward the transistor Tr1, for example, the collector current of the transistor Tl-11 increases and the collector current of the transistor Tr2 decreases.

In this way, by operating the potentiometer VR2°, the collector current of one transistor can be increased and the collector current of the other transistor can be simultaneously decreased. The amount of change from the value may be relatively small.

FIG. 6 shows an embodiment of this invention which can be operated with only one operating power supply +EB.

The emitter of one transistor Tr1□ is grounded, and the collector is connected to the operating power supply element EB via a variable resistor VRH serving as collector current adjusting means.

The terminal of the other transistor Tr1□ is the operating power supply +E
B, and its collector is grounded via a resistor R1°.

Other than this, this embodiment is the same as each of the embodiments described above.

Note that this is not a case to be explained, but each transistor Tr□1. T
The emitter of r□2 is grounded directly or via the operating power supply +EB, and this embodiment is a push-pull amplifier of the common emitter type.

Another example of how to take out the output of the amplifier according to the invention described above is shown in FIG.

Resistor R30t R32 and potentiometer vR are connected between the output extraction capacitors C11 and C12 shown in Figure 3.
3 are connected in series, the slider tap of the potentiometer vR3 is grounded, and the output terminal OUT is connected to the capacitors C1□ and C□2 via the resistor R33tR34.

In this way, by changing the position of the slider tap of potentiometer VR3□, each transistor TT
The alternating current load resistance r 112 r12 of the transistors Tr 11 . Since each alternating current output of the Tr 12 is mixed and extracted using a resistor, the gain of the amplifier can be maintained constant and adjusted.

Therefore, in this embodiment, it is possible to eliminate variations in gain among products.

Other than this, it is substantially the same as FIG. 3.

As described above, in the amplifier of this invention, each emitter circuit of a pair of push-pull connected complementary transistors is directly grounded, a load resistor is connected in series to each collector circuit, and these resistors are used to The transistor is configured to drop a considerable portion of the operating power supply voltage applied to the transistor, and to divide the voltage applied between the emitter and collector of each transistor to obtain a base-emitter bias voltage of each transistor. , at least one of the load resistors is a variable resistor to compensate for the symmetry of operation of the transistors.

Therefore, it is possible to improve bias stability without inserting a stabilizing resistor, etc., which is a source of thermal noise, into the emitter circuit of each transistor, and a good S/N ratio can be achieved.
In addition, by using a variable resistor as at least one of the load resistors, it is possible to prevent the occurrence of secondary distortion due to the asymmetry of each transistor, and to achieve an extremely low distortion factor. Since it is installed in the collector circuit of the transistor, the S
Many effects such as no deterioration of /N can be obtained.

[Brief explanation of drawings]

Figure 1 is an electric circuit diagram for explaining the prior art, Figure 2 is an electric circuit diagram for explaining the basic principle of this invention, and Figures 3 to 6 are examples of different embodiments of this invention. FIG. 7 is an electric circuit diagram showing another example of how to extract the output of the amplifier according to the invention. +EB? EB...Operating power supply, Tr□, Tr
2Tr1□, Tr□2...Transistor, R1
,R2-,R5ツR11ツ°"tR19ツR21AR3
0f R32, R33tR34...Resistance, ■R□
□・・・・・・Variable resistance, ■R22, ■R3□・・・
...Potentiometer, C1□, ...Ci4...
...Capacitor.

Claims (1)

[Scope of utility model registration request] Each emitter circuit of a pair of complementary transistors connected in a push-pull manner is directly grounded, and a load resistor is connected in series with each collector circuit, and a considerable portion of the operating power supply voltage applied to each of the transistors is handled by these resistors. By lowering the voltage and dividing the voltage applied between the emitter and collector of each transistor,
A complementary push-pull amplifier characterized in that it is configured to obtain an emitter-to-emitter bias voltage, and that at least one of the load resistors is a variable resistor to compensate for the symmetry of operation of each of the transistors.