JPS5825265A - Manufacture of mosfet - Google Patents

Abstract

PURPOSE:To improve the characteristic of MOSFET by making a source and a drain by using as a mask a poly-Si gate electrode provided on a P type Si substrate through the intermediary of a gate insulated film, by applying high-pressure low-temperature oxidation processing thereto, by exposing poly-Si selectively, and by applying a large amount of doping thereto. CONSTITUTION:A poly-Si gate electrode 3 is prepared on a P type Si substrate 1 through the intermediary of a gate oxide film 2, and an N type soource 4 and an N type drain 5 are prepared by P diffusion with the electrode 3 as a mask. When they are oxidized subsequently in an atmosphere of high pressure and low temerature, an oxide film 6 on the poly-Si electrode 3 is made thinner than an oxide film 7 on the Si substrate. Next, the poly-Si oxide film 6 is removed selectively and P diffusion is conducted under the condition that the oxide film 7 of the substrate remains. Thereby only the poly-Si 3 is doped much and made to be of low resistance. This constitution enables lowering of a resistance value of the gate electrode of MOSFET wherein the depth of junction of the source and drain and the thickness of the gate oxide film are small, and thus the characteristic thereof can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is a MOS r! Regarding the manufacturing method, the present invention provides a method applying the cell 7 alignment method using polycrystalline silicon as a gate electrode.

Recent irises 01 r seal! As the channel becomes shorter, the junction surface between the source and drain must be made shallower (11), and the gate oxide film must also be thinner.

As a result of trying to make the junction surface shallower, when the source and drain are made in 77 cell lines using the conventional p2o1 pre-deposition method, there is not enough impurity introduced into the polycrystalline silicon that makes up the gate electrode, resulting in a high resistance value of the gate electrode. Together at home,
r-swear! In addition, when forming the source and drain by ion implantation, it is not possible to lower the resistance value of polycrystalline silicon by using the gate oxide film as a mask and depositing P2O after implantation. Although it is possible, since the gate oxide film is set thin, P, 0. It no longer functions as a diffusion mask.

The present invention solves such problems EI! The details of this work will be explained below with reference to the drawings.

FIG. 1 shows a state in which a gate electrode (31) made of polycrystalline silicon is provided on a semiconductor substrate 1 of one conductivity type, eg, a silicon substrate (1) of PLN, via a gate oxide film (2J).

Next, using this gate electrode (31 as a mask for the diffusion of the xm impurity), a leg-shaped impurity 1, for example ?ffi'I, is diffused using a pre-deposition method to form the source and drain (4 bars 5) of the MW1. (Figure 2).

Subsequently, the substrate in the state shown in FIG. 2 was oxidized in a high-pressure, low-temperature atmosphere to form a gate electrode (3
1 as well as the source and drain (4 and 5) surfaces are oxidized.

According to this high-pressure low-temperature oxidation, the thickness of the oxide film grown on the surface of polycrystalline silicon is different from the thickness of the oxide film formed on the surface of single-crystal silicon.

The former is thinner than the latter. To explain with a specific example,
750℃"?' 6 */am2. x f A I
After 40 minutes of I conversion, a polycrystalline oxide film (approximately 1400 μm thick) was formed on the surface of the polycrystalline silicon (31), as shown in Figure 3.
6) But.

In addition, approximately 250
A substrate oxide film (7) of OA@ is grown respectively.

Next, the polycrystalline oxide film (6) and the substrate oxide film (7) are etched using the normal may etching method, but this etching process is important and ends when the polycrystalline oxide film (6) is removed. There is a need. In the case of this B11F etching method, since the etching rate of the polycrystalline oxide film (6) and that of the substrate oxide film (7) are the same, the point at which the relatively thin polycrystalline oxide film (6) is removed is However, about 100 ROM remains of the substrate oxide film (7) as shown in FIG. The oxide film with a thickness of about 1 ooo^0 is usually made of P and O.

Since it has a shielding effect on diffusion due to the pre-deposition method, the substrate in the state shown in the IN4 diagram (P2O in IJ,
When diffusion is performed by the pre-deposition method, a large amount of phosphorus is diffused only into the gate electrode (31) made of polycrystalline silicon, and the resistance value of the electrode (31) can be lowered.

As is clear from the above description, the present invention utilizes the difference in growth rate of oxide films between polycrystalline silicon and single crystal silicon in high-pressure low-temperature oxidation to diffuse impurities only into the gate electrode. With a shallow drain junction depth and a thin gate oxide film, it is possible to lower the resistance value of the gate electrode of MOS Pm?, which has excellent characteristics.
It becomes possible to manufacture

[Brief explanation of the drawing]

1 to 4 are cross-sectional views showing the method of the present invention in the order of steps, in which (l) is a substrate, and 12J is a gate oxide film. (31 is the gate electrode, (4 bars 51 are the source, drain,
(8) indicates a polycrystalline oxide film, and (71 indicates a substrate oxide film).

Claims (1)

[Claims] 1) - Form a gate electrode made of polycrystalline silicon on the surface of a conductive type semiconductor substrate through a gate electrode, and use this gate electrode as a mask to introduce impurities of the opposite conductivity type into the substrate to form a source and a drain. First, the polycrystalline silicon constituting the gate electrode and the source and drain are oxidized in a high-pressure, low-temperature oxidation atmosphere to form a relatively thin polycrystalline oxide film on the polycrystalline silicon and the surface of the source and drain. A thick substrate oxide film is formed, then the polycrystalline oxide film is removed while the substrate oxide film remains to expose the polycrystalline silicon, and finally a large amount of impurities is doped from the surface of this exposed polycrystalline silicon. A MOS that is characterized by lowering the resistance value as a gate electrode. manufacturing method.