JPS5822456A - デイジタル論理装置 - Google Patents

デイジタル論理装置

Info

Publication number
JPS5822456A
JPS5822456A JP56120411A JP12041181A JPS5822456A JP S5822456 A JPS5822456 A JP S5822456A JP 56120411 A JP56120411 A JP 56120411A JP 12041181 A JP12041181 A JP 12041181A JP S5822456 A JPS5822456 A JP S5822456A
Authority
JP
Japan
Prior art keywords
circuit
fault
pseudo
output
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56120411A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6141425B2 (enrdf_load_stackoverflow
Inventor
Noritaka Umeno
典隆 梅野
Seiichiro Hayashi
誠一郎 林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56120411A priority Critical patent/JPS5822456A/ja
Publication of JPS5822456A publication Critical patent/JPS5822456A/ja
Publication of JPS6141425B2 publication Critical patent/JPS6141425B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
JP56120411A 1981-07-30 1981-07-30 デイジタル論理装置 Granted JPS5822456A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56120411A JPS5822456A (ja) 1981-07-30 1981-07-30 デイジタル論理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56120411A JPS5822456A (ja) 1981-07-30 1981-07-30 デイジタル論理装置

Publications (2)

Publication Number Publication Date
JPS5822456A true JPS5822456A (ja) 1983-02-09
JPS6141425B2 JPS6141425B2 (enrdf_load_stackoverflow) 1986-09-16

Family

ID=14785551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56120411A Granted JPS5822456A (ja) 1981-07-30 1981-07-30 デイジタル論理装置

Country Status (1)

Country Link
JP (1) JPS5822456A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01254324A (ja) * 1987-12-21 1989-10-11 Matsushita Electric Works Ltd 金属板の加工方法

Also Published As

Publication number Publication date
JPS6141425B2 (enrdf_load_stackoverflow) 1986-09-16

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