JPS58219743A - Testing method for mos type semiconductor device - Google Patents

Abstract

PURPOSE:To inspect the defect of a field oxide film based on the presence of the current flowing between diffused layers by a method wherein a fixed voltage is impressed between the diffused layers which are isolated by the field oxide film. CONSTITUTION:The field oxide film 2, gate oxide films 3 and 5, and gate electrodes 4 and 6 are formed on an Si substrate 1. A DC power source 31 is connected to the diffused layer 101 via an Ampere meter 33. The negative poles of power sources 31 and 32 are connected to the diffused layer 102. In case that the film 2 is not formed, when the voltage higher than the threshold voltage of the MOSFET composed of the film 3 and the electrode 4 is impressed on the electrode 4, and the voltage higher than the threshold voltage of the MOSFET composed of the film 5 and the electrode 6 is impressed on the electrode 6, the layers 101 and 102 become into conduction to each other.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for testing an MO8 type semiconductor device for electrically testing patterning defects in a field oxide film in an MO8 type semiconductor integrated circuit.

The reality is that the conventional method for inspecting defects in the field oxide film in MO8 type semiconductor integrated circuits mainly relies on visual inspection using a microscope after the field oxide film is formed. Therefore, it takes a long time to inspect, and at the end of the entire process, many films are formed on the field oxide film, making visual inspection impossible at this stage.

This invention was made in view of the above points, and MO
It is an object of the present invention to provide a method for testing an MO8 type semiconductor device, which allows defects in a field oxide film to be detected by an electrical method after completion of all manufacturing steps of an MO8 type semiconductor integrated circuit.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Examples of the method for testing MO8 type semiconductor devices of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of an MO8 type semiconductor device applied to one embodiment. In addition, Fig. 2 shows a cross-sectional view taken along line ■-II in Fig. 1 and the measurement circuit system, and Fig. 3 shows a cross-sectional view of I-Mill in Fig. 1 and the measurement circuit system. In FIG. 3, 31 is a DC power supply for applying voltage between adjacent diffusion layers, 32 is a variable DC power supply for applying voltage to the gate electrode, and 33 is for detecting the current flowing between adjacent diffusion layers. It is a DC ammeter.

The illustrated embodiment is applied to a memory cell portion of a one-capacitor, one-transistor type dynamic random access memory device having a two-layer polysilicon structure.

In actual testing, a chip with wiring suitable for testing is placed on the same mask as the pattern of the memory cell portion. By doing so, the test can be conducted without any change in the manufacturing process.

Now, in FIGS. 1 to 3, 1 is a silicon substrate, 2 is a field oxide film with a film thickness of 5,000 to 10,000 Å, 3 is a first gate oxide film with a film thickness of 200 to 1,000 λ,
4 is a first gate electrode, and 5 is a second gate oxide film having a thickness of 200 to 1,000.

A second gate electrode 6 is formed on this second gate oxide film 5. □ This first gate electrode 4. The second gate electrode 6 is connected to the positive electrode of the variable DC power supply 32 .

Further, 101 and 102 are diffusion layers, respectively. A positive electrode of a DC power source 31 is connected to the diffusion layer 101 via a DC ammeter 33. The negative electrodes of the DC power supply 31 and the variable DC power supply 32 are connected to the diffusion layer 102. 21 indicates a defect in the field oxide film.

Although not shown, an actual random access memory device includes an insulating film, metal wiring, and a protective film.

Now, as shown in FIG. 2, when the active region is separated by the field oxide film 2, the threshold voltage of the parasitic MO8FET constituted by the field oxide film 2 and the first gate electrode 4 is It is usually 10V or more, and within the normal device operating voltage range, the parasitic MO
8FET is not conductive.

However, as shown in FIG. 3, if the field oxide film 2 is not formed, the threshold i value voltage (for example, 0.5 At the same time, a voltage higher than the threshold voltage of the MOSFET (for example, about 0.5 ) If a higher voltage is applied to the second gate electrode 6 from the variable DC power supply 32, the diffusion layers 101 and 102 become conductive.

Therefore, the diffusion layer 101 is 0■, the diffusion layer 102 is 5■
and applying a voltage lower than the threshold voltage of the first M08FET and the first M08FET, such as Ov, to the first gate electrode 4 and the second gate electrode 6,
It is confirmed by the DC ammeter 33 that no current flows between the diffusion layers 101 and 102. This is the diffusion layer 101.102
This is to confirm that there is no direct short circuit between the two.

The first gate electrode 4 and the second gate electrode 6 are provided with a voltage higher than the threshold voltage of the first gate MOSFET and the second gate MOSFET, such as 5V, and which is higher than the threshold voltage of the field oxide parasitic MOSFET. A voltage lower than the value voltage is applied, and it is determined whether a current flows between the diffusion layers 101 and 102. As a result, if current flows,
It can be seen that there is a defect 21 in the field oxide film 2.

As explained above, in the first embodiment, patterning defects in the field oxide film 2 are removed by an electrical method.
Since it is detected separately from other defect modes, it is possible to perform patterning defect inspection of the field oxide film 2 at high speed and accuracy.

Note that in the first embodiment, the device under test is
Although the memory cell portion of a MOS dynamic RAM having a two-layer polysilicon structure has been described, an effect similar to that of the first embodiment can be obtained if it is an MO8 type semiconductor device having an electrode on a field oxide film.

As described above, according to the method for testing an MO8 type semiconductor device of the present invention, a voltage is applied between two or more adjacent diffusion layers of an MO8 type semiconductor device having an electrode on a field oxide film. By applying different voltages to the electrodes on the gate oxide film at least twice and testing the presence or absence of defects in the p-field oxide film based on the presence or absence of current flowing to the adjacent diffusion layer, MO8 type semiconductor devices After the entire manufacturing process is completed, the field oxide film can be electrically tested for defects. Along with this, testing is possible even when there are many field oxide films, and compared to conventional visual inspection, inspection time can be significantly shortened and inspection accuracy is improved. .

[Brief explanation of the drawing]

FIG. 1 is a plan view of the memory section of a dynamic random access memory device applied to an embodiment of the MO8 type semiconductor device testing method of the present invention, and FIG. 2 is a plan view of the memory section of FIG.
FIG. 3 is a sectional view taken along line 1--1 in FIG. 1 and a diagram illustrating the measuring circuit system. 1... Silicon substrate, 2... Field oxide film, 3
°°°first gate oxide film, 4...first gate electrode, 5...second gate oxide film, 6...second gate electrode. 31... DC power supply, 32... Variable DC power supply, 33.
...DC ammeter. Procedural amendment May 18, 1980 Kazuo Wakasugi, Commissioner of the Patent Office2, Title of invention: Testing method for MO8 type semiconductor device 3, Relationship with the person making the amendment Patent Applicant (029) Oki Electric Industry Co., Ltd. Co., Ltd. 5. Date of amendment order: 1939, month, day (voluntary) 6. The detailed description of the invention in the specification subject to amendment is corrected to ``another film feels'' on the oxide film.

Claims (1)

[Claims] A predetermined voltage is applied between two or more adjacent diffusion layers separated by a field oxide film in an MO8 type semiconductor device, and at least a voltage is applied between the gate electrode on the field oxide film, the gate electrode on the gate oxide film, and the diffusion layer. 2
A method for testing an MO8 type semiconductor device, characterized in that defects in the field oxide film are inspected based on the presence or absence of current flowing between the diffusion layers by applying different voltages more than once.