JPH04213850A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To enable the characteristics of an element to be measured before a metal process by a method wherein a wiring and a pad used for measurement are formed of the same component element as a measuring semiconductor element. CONSTITUTION:A field oxide film 12 is formed on a substrate through a LOCOS method excluding an element region and a predetermined wiring and pad region. Then, the wiring 16 and the pad 17 of a gate electrode 14 are formed at the same time when a gate oxide film 13 and a gate electrode 14 are formed leaving a polysilicon film unremoved on the field oxide film 12. In succession, ions are implanted into the region of a substrate which are to serve as a wiring and a pad at the same time when an N<+> diffusion layer 15 is formed, and the wiring 18 and the pad 19 of a source and a drain are formed of the N<+> diffusion layer 15. The terminals of a tester are brought into contact with the pads 17 and 19, and then the characteristics of an element are measured as a voltage and a current of prescribed value are applied.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for measuring the characteristics of an element and a method for manufacturing the same.

0002

2. Description of the Related Art Generally, a characteristic evaluation semiconductor device (hereinafter referred to as TEG) is used to measure the characteristics of an element of a semiconductor device. TEG (Test Elem
Semiconductor elements such as transistors, capacitors, and diffusion layers are built into the group. When measuring the characteristics of an element, the terminals of those elements are usually connected to a device (hereinafter referred to as a measuring device) that measures the characteristics of the element through wiring and a hardware made of Al or an alloy mainly made of Al (hereinafter referred to as metal). make contact with the terminal. Then, by applying a predetermined voltage and current to the terminals of the element from the measuring instrument, the characteristics of the semiconductor element are measured.

FIGS. 2(a) and 2(b) show conventional NMOS
A plan view and a cross-sectional view of the TEG of Tr are shown. This T
EG is manufactured as follows. First, a field oxide film 2 is selectively formed on a P-type Si substrate 1 by the LOCOS method, and then thermal oxidation for gate oxide film formation, polysilicon film formation, phosphorus doping, and gate patterning are performed to form an element area of the substrate 1. Gate oxide film 3 and gate electrode 4 are then formed. Next, by performing source/drain ion implantation (ion species: As) and As annealing, source/drain regions 5 are formed in the device regions on both sides of the gate electrode 4.
form. With the above steps, the NMOS Tr is completed. Thereafter, a BPSG film 6 is formed as an intermediate insulating film over the entire surface, and N2 annealing is performed to smooth the surface. Furthermore, after performing contact patterning, metal is generated on the entire surface and metal patterning is performed to form interconnections 7 and pad portions 8, and the TEG is completed. In this TEG, by bringing the terminal of the measuring device into contact with the metal pad part 8 and applying voltage and current to the NMOS Tr, the NMOS
The characteristics of Tr can be measured.

0004

[Problems to be Solved by the Invention] However, in the conventional TEG and its manufacturing method as described above, since the pad portion 8 and the wiring 7 are formed in the final metal process, the elements are not connected to each other in the previous stage. There was a problem in that the terminals of the measuring device could not be contacted and the characteristics of the element could not be measured.

The present invention has been made in view of the above points, and an object of the present invention is to provide a semiconductor device and a method for manufacturing the same, in which the characteristics of an element can be measured before metal processing.

[0006]

[Means for Solving the Problems] The present invention provides a semiconductor device for measuring characteristics and a method for manufacturing the same, in which wiring and pad portions for measurement are formed of the same elements as the constituent elements of a semiconductor element for measurement. It is.

[0007]

[Operation] In the present invention, since the wiring and pad portion for measurement can be obtained at the same time as the semiconductor element is formed using the same elements as the constituent elements of the semiconductor element for measurement, the characteristics of the element can be measured immediately after the element is formed before the metal process. becomes possible.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows one embodiment of this invention (NMOS Tr
(a) is a perspective view, and (b) and (c) are cross-sectional views.

FIG. 1(a) is a perspective view of the NMOS Tr upon completion of formation, in which 11 is a P-type Si substrate, 12 is a field oxide film, 13 is a gate oxide film, 14 is a gate electrode, and 15 is a source/drain. However, in this case, the field oxide film 12 is a LOCOS
When forming the field oxide film 12 by the method, the field oxide film 12 is formed except for the element region and the region that will become wiring and pad portions in the future. Furthermore, when forming the gate oxide film 13 and the gate electrode 14 by thermal oxidation for gate oxide film formation, polysilicon film generation, phosphorus doping, and gate patterning, the polysilicon film is also left on the field oxide film 12 and the gate electrode wiring 16 and pad portion 17 are formed at the same time. moreover,
When forming the N+ diffusion layer 15 as the source/drain by As ion implantation and As annealing, ions are also implanted into the substrate region which will become the wiring and pad portion, and at the same time the source/drain wiring 18 and the pad portion 19 are formed with the N+ diffusion layer 15. It is formed by a diffusion layer 15. Therefore, in this embodiment, the measurement wiring 1 is formed at the same time as the NMOS Tr is formed.
6, 18 and pad portions 17, 19 are formed, and by contacting the terminals of the measuring device with the pad portions 17, 19 (square shape of approximately 100 μm on a side) and applying a predetermined voltage and current, the formation of the Tr is completed. The characteristics of the Tr can be measured.

Thereafter, a BPSG film 20 is formed as an intermediate insulating film over the entire surface of the substrate as shown in FIG. Contact hole 21 (80μ on each side)
Open a square shape (about 1.2 m square). As a result, by bringing the terminals of a measuring device into contact with the pad portions 17 and 19 through the contact hole 21, it is possible to measure the characteristics of the Tr at the time after the contact hole is formed.

Thereafter, metal is deposited and patterned to form a metal pad portion 22 in the contact hole 21 portion, as shown in FIG. 1(c). By bringing a terminal of a measuring device into contact with this metal pad portion 22 and applying voltage and current, the characteristics of the Tr after the metal process can be measured.

[0012] Although the above embodiment is for an NMOS Tr, even for other devices, the characteristics of the device can be improved before the metal process by forming wiring and pad portions using the same elements as the components of the device. Measurement becomes possible.

[0013]

[Effects of the Invention] As explained in detail above, according to the present invention, the wiring and pad portion for measurement are formed using the same elements as the constituent elements of the semiconductor element, so that It becomes possible to measure the characteristics of a semiconductor element, and by measuring the characteristics after each manufacturing process as described in the examples, it is possible to qualitatively and quantitatively understand the influence of each manufacturing process on the element.

[Brief explanation of the drawing]

FIG. 1 is a perspective view and a sectional view showing an embodiment of a semiconductor device and manufacturing method of the present invention.

FIG. 2 is a plan view and a cross-sectional view of a conventional NMOS Tr TEG.

[Explanation of symbols]

11 P-type Si substrate 14 Gate electrode 15 N+ diffusion layer 16 Wiring 17 Pad part 18 Wiring 19 Pad section

Claims (2)

[Claims] 1. A semiconductor device comprising: a semiconductor substrate; a semiconductor element for measuring characteristics formed on the substrate; and wiring and pads for measurement formed on the substrate using the same elements as the elements. A semiconductor device. 2. A semiconductor device in which a semiconductor element for measuring characteristics is formed on a semiconductor substrate, and at the same time, wiring and pad portions for measurement are formed on the substrate using the same elements as the constituent elements of the element. manufacturing method.