JPS5821834B2 - Manufacturing method for wiring boards - Google Patents
Manufacturing method for wiring boardsInfo
- Publication number
- JPS5821834B2 JPS5821834B2 JP53139992A JP13999278A JPS5821834B2 JP S5821834 B2 JPS5821834 B2 JP S5821834B2 JP 53139992 A JP53139992 A JP 53139992A JP 13999278 A JP13999278 A JP 13999278A JP S5821834 B2 JPS5821834 B2 JP S5821834B2
- Authority
- JP
- Japan
- Prior art keywords
- wire
- circuit pattern
- plating
- manufacturing
- plug
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】
本発明は、接栓めつきを必要とする配線板の製造法に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a wiring board that requires plugging.
近年、必要な配線パターンに絶縁ワイヤー(以下ワイヤ
と略す)を使用した配線板(以下マルチワイヤー配線板
(日立化成工業@)商品名)と略す。In recent years, wiring boards (hereinafter referred to as multi-wire wiring boards (Hitachi Chemical @) product name) that use insulated wires (hereinafter referred to as wires) for the necessary wiring patterns.
)は、多種小量生産に適する高密度配線板として、デー
タ処理装置、通信機械、電子応用装置等に使用され始め
ている。) has begun to be used in data processing equipment, communication equipment, electronic application equipment, etc. as a high-density wiring board suitable for small-scale production of a wide variety of products.
マルチワイヤー配線板は、熱硬化性樹脂積層板等の絶縁
基板の片面又は両面に通常のエツチドホイル法等により
回路パターンを形成し、回路パターン上(接栓部分を除
く)に、ワイヤをはわせてゆくと同時に接着する布線時
には熱可塑性を保持する熱硬化性接着層を積層接着塗布
あるいは熱圧着したものに、例えば数値制御布線機によ
りポリイミド樹脂等の耐熱性樹脂により被覆された絶縁
電線(ワイヤー)を布線し、布線したワイヤを固定する
ためプリプレグ等を積層接着し、ワイヤーの端末で、ワ
イヤーを横切るスルホールをあけスルホール周壁にワイ
ヤーの切断端を露出させ、スルホール内壁にワイヤーの
切断端と接続する無電解金属層を形成させて製造してい
る。Multi-wire wiring boards are made by forming a circuit pattern on one or both sides of an insulating substrate such as a thermosetting resin laminate using the usual etched foil method, and then running wires over the circuit pattern (excluding the plug part). When wiring is bonded at the same time, an insulated wire coated with a heat-resistant resin such as a polyimide resin ( Wire), laminated and glue prepreg, etc. to fix the wire, and at the end of the wire, make a through hole that crosses the wire, exposing the cut end of the wire on the peripheral wall of the through hole, and cut the wire on the inner wall of the through hole. It is manufactured by forming an electroless metal layer connected to the end.
このマルチワイヤー配線板の回路パターンの接栓に金等
の電気めっき(接栓めつき)を行う場合、従来は、絶縁
基板の片面又は両面に通常のエツチドホイル法等により
回路パターンを形成した後に行っていた。When electrically plating gold or other metal (plug plating) on the circuit pattern connectors of this multi-wire wiring board, conventionally it was done after forming the circuit pattern on one or both sides of the insulating substrate by the usual etched foil method. was.
このため接栓めつき時には銅箔層による回路パターンが
露出しており回路パターンを接栓めつき液より保護する
ため回路パターンの接栓を除く部分にめっき保護マスク
を施こし保護マスク境界部よりめっき液の浸入を防ぐた
め保護マスク境界部の熱圧着を必要としている。For this reason, when plating the connectors, the circuit pattern made of the copper foil layer is exposed, and in order to protect the circuit pattern from the connector plating solution, a plating protective mask is applied to the part of the circuit pattern other than the connectors, and from the border of the protective mask. To prevent infiltration of plating solution, thermocompression bonding is required at the border of the protective mask.
即ち、第1図に示すように、絶縁基板1の片面又は両面
に接栓2を含む回路パターン3を形成しくa)1回路パ
ターンの接栓を除く部分にめっき保護マスク4を施こし
くb)、保護マスクの境界部5を熱圧着し、接栓めつき
を行っている(C)。That is, as shown in FIG. 1, a circuit pattern 3 including a plug 2 is formed on one or both sides of an insulating substrate 1.a) A plating protection mask 4 is applied to the portion of one circuit pattern excluding the plug.b) ), the boundary part 5 of the protective mask is thermocompression bonded and the plug is attached (C).
このため製造工程が複雑となり、その改善が望まれてい
た。This complicates the manufacturing process, and improvements have been desired.
本発明はこのマルチワイヤ配線板において銅箔層の回路
パターン形成後回路パターン上(接栓を除く)に接着層
を積層接着または塗布または熱圧着した後ワイヤを布線
し布線したワイヤを固定するためにプリプレグを積層接
着した後に接栓めつきを行なうことにより接栓めつき時
におけるめつき保護マスクの形成と、保護マスク境界部
の熱圧着を省略しようとするものである。In this multi-wire wiring board, after a circuit pattern is formed on a copper foil layer, an adhesive layer is laminated, bonded, applied, or thermocompressed on the circuit pattern (excluding the plug), and then wires are laid and the wires are fixed. In order to do this, the plug plating is performed after the prepregs are laminated and bonded, thereby omitting the formation of a plating protective mask during plug plating and the thermocompression bonding of the boundary portion of the protective mask.
第2図により本発明を説明する。The present invention will be explained with reference to FIG.
まず、絶縁基板1の片面又は両面に接栓2を含む回路パ
ターン3を形成する(a)。First, a circuit pattern 3 including a plug 2 is formed on one or both sides of an insulating substrate 1 (a).
接栓を除く回路パターン上に接着層6を積層接着または
塗布、または熱圧着した後、ワイヤ7を布線しくb)、
布線したワイヤを固定するために、プリプレグを積層接
着して表面被覆層8を形成した後(C)接栓めつきを行
うものである。After laminating, applying, or thermocompression bonding the adhesive layer 6 on the circuit pattern except for the plug, wire the wire 7b),
In order to fix the wires, prepregs are laminated and bonded to form a surface coating layer 8, and then (C) plugging is performed.
これにより表面保護マスク塗布並びに境界面熱圧着の作
業が省略出来、工程簡略、副資材の低減が達成される。This makes it possible to omit the work of applying a surface protection mask and thermocompression bonding to the boundary surface, simplifying the process and reducing the amount of auxiliary materials.
本発明は、以上説明したマルチワイヤー配線板のみでな
く、接栓を除く回路パターンに最終的に、化学的腐蝕、
機械的損傷防止のために熱硬化性樹脂層の表面被覆層が
形成される配線板に適用され、同様の効果が達成される
。The present invention is not only for the multi-wire wiring board described above, but also for the circuit pattern excluding the plugs.
A similar effect is achieved when applied to wiring boards on which a surface coating layer of a thermosetting resin layer is formed to prevent mechanical damage.
図面は、配線板の製造工程を説明する平面図で第1図は
従来の場合、第2図は本発明の場合を示す。
符号の説明、1・・・・・絶縁基板、2・・・・・・接
栓、3・・・・・・回路パターン、4・・・・・・めっ
き保護マスク、5・・・・・・めっき保護マスク境界部
、6・・・・・・接着層、7・・・・・・ワイヤ、8・
・・・・・表面被覆層。The drawings are plan views illustrating the manufacturing process of the wiring board, and FIG. 1 shows the conventional case, and FIG. 2 shows the case of the present invention. Explanation of symbols, 1... Insulating board, 2... Connection, 3... Circuit pattern, 4... Plating protection mask, 5...・Plating protection mask boundary, 6...Adhesive layer, 7...Wire, 8...
...Surface coating layer.
Claims (1)
に無電解メッキ層を形成する。[Claims] 1. A method for manufacturing a wiring board comprising the following steps. a. Form a circuit pattern including plugs on an insulating substrate. b. Forming an adhesive layer on the circuit pattern excluding the plugs. Wire an insulated wire on the C6 adhesive layer. d. Forming a surface coating layer on the wiring wire. e. Fit the connector. f. Drill a through hole across the wire and form an electroless plating layer on the inner wall of the through hole.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53139992A JPS5821834B2 (en) | 1978-11-14 | 1978-11-14 | Manufacturing method for wiring boards |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53139992A JPS5821834B2 (en) | 1978-11-14 | 1978-11-14 | Manufacturing method for wiring boards |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5567187A JPS5567187A (en) | 1980-05-21 |
JPS5821834B2 true JPS5821834B2 (en) | 1983-05-04 |
Family
ID=15258408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53139992A Expired JPS5821834B2 (en) | 1978-11-14 | 1978-11-14 | Manufacturing method for wiring boards |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5821834B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0429389Y2 (en) * | 1985-08-12 | 1992-07-16 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50128660U (en) * | 1974-04-05 | 1975-10-22 |
-
1978
- 1978-11-14 JP JP53139992A patent/JPS5821834B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0429389Y2 (en) * | 1985-08-12 | 1992-07-16 |
Also Published As
Publication number | Publication date |
---|---|
JPS5567187A (en) | 1980-05-21 |
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