JPS58213472A - Mos type semiconductor device - Google Patents

Abstract

PURPOSE:To lessen the irregularity in transistor characteristics by a method wherein an MOS type transistor having an offset diffusion layer on the drain side only and another MOS type transistor having an offset diffusion layer on both drain and source sides are joined together. CONSTITUTION:The characteristics of transistors are stabilized by reducing the irregularity of channel length using offset diffusion layers 21 and 22 on source 19 side and drain 20 side on a P-channel MOS type transistor 18. On the other hand, an MOS type transistor, having an offset diffusion layer 26 on the drain 25 side only, is used on an N-channel MOS type transistor 24, thereby enabling to increase an ON current and to contrive high integration of the titled semiconductor device.

Description

[Detailed description of the invention] The present invention relates to the structure of a MOB type semiconductor device.

Conventionally, there are two types of MOEi type semiconductor devices using an ion-implanted layer under an oxide film formed by selective oxidation as an offset diffusion layer, as shown in FIGS. 1 and 2. They have been used in driver circuits for highly integrated semiconductor devices that require a withstand voltage of several tens of microns, but each has its own advantages and disadvantages. M with a structure having offset diffusion layers 5 and 4 only on the drain 1 and 2 sides shown in FIG.
The O8 type transistor has the advantage of being smaller in size and having a larger on-current than the YOS type transistor, which has offset diffusion layers on both the drain and source sides, as shown in Figure 2. Because the channel length changes due to the mask alignment error between the oxide film 5.6 created by the oxidation method and the polycrystalline silicon gate layout @7.8, the transistor characteristics change depending on the direction in which the transistor is placed within the same chip, resulting in large variations. There are drawbacks. In particular, in a P-channel MO8 type transistor, the on-resistance of the channel portion 9 is greater than the resistance of the offset diffusion layer 4, and the transistor characteristics vary greatly due to changes in channel length. Drain 10.11 shown in Figure 2
Offset diffusion layers 14. on both the source 12 and 13 sides.
Unlike the transistor shown in Fig. 1, the MOB type transistor with a structure of 1s and 16.17 has the advantage that there is little variation because the channel length is determined by the line width of photo-etching of the silicon nitride film before selection. However, in an N-channel MO8 type transistor, which has an offset diffusion layer on the source side and has a large resistance value of the offset diffusion layer 16, the first
There is a drawback that the on-current is greatly reduced compared to the N-channel MO8 type transistor shown in the figure.

By combining the above two types of MO8 type transistors, the present invention achieves high integration, which is suitable for liquid crystal driving semiconductor devices with an increasing number of pins, by using transistors with low transistor characteristics (less fluctuations and large on-current). Moreover, the present invention provides a MOB type semiconductor device with improved breakdown voltage characteristics.In the MO8 type semiconductor device of the present invention, as shown in FIG. By using an MO8 type transistor having an offset diffusion layer 21, 22 in the P channel MO8 type transistor, the variation in channel length is reduced and the characteristics are stabilized.The resistance value of the offset diffusion layer 21, 22 of the P channel MO8 type transistor is The reduction in on-current due to the source-side offset diffusion layer 21 is small compared to the resistance.On the other hand, by using an MO8-type transistor having an offset diffusion layer 26 only on the drain 25 side for the N-channel MO8-type transistor 24, the on-current can be increased. and aim for high integration.

In the N-channel MO13 type transistor, since the resistance of the offset diffusion layer 26 is large, variations in characteristics due to changes in channel length are reduced.

As described above, the MO8 type semiconductor device of the present invention uses MOB type transistors suitable for high integration and characteristic stabilization for each of the P-channel MO8 type transistor and the N-channel MO8 type transistor. This method overcomes the drawbacks of the previous method, and is highly suitable for semiconductor devices for driving liquid crystal display devices that require a large number of bins for matrix displays and the like.

[Brief explanation of the drawing]

1 and 2 show a conventional Moth type semiconductor device using an offset diffusion layer under a selective oxide film. FIG. 3 shows a Moth type semiconductor device using an offset diffusion layer under a selective oxide film according to the present invention.
type semiconductor device. 1. 2, 10, 11, 25. 20 cram school... drain 12.
13, 19... Source 5, 4, 14, 15, . 16, 17, 21
, 22.26...offset diffusion layer 5.6...oxide film 7.8 by selective oxidation method
...Gate polycrystalline silicon wiring 9.23...Channel portion 18...P channel MO8 type transistor 24...N channel MO8 type transistor or above Applicant Tanwa Seikosha Co., Ltd. Representative Patent Attorney Tsutomu Mogami Figure 2 Figure 3

Claims (1)

[Claims] M' characterized in that at least some of the N-channel MO8 type transistors have an offset diffusion layer on the drain side, and at least some of the P-channel MO8 type transistors have offset diffusion layers on both the drain side and the source side. O8 type semiconductor device.