JPS5820559B2 - Induction motor speed control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a speed control device that operates an induction motor as a two-speed motor and is suitable for positioning and stopping a load machine.

In recent years, as machines have become more precise and faster, the demand for positioning control has increased.

In this case, since the stopping accuracy is approximately proportional to the square of the speed of the driven object, the stopping accuracy can be dramatically improved if the driven object is once switched to low-speed operation and then stopped.

For this reason, variable speed motors such as parent-child motors, multi-stage reduction gears, or 5CR motors have traditionally been used to achieve low-speed operation, but these are all expensive, and they are simply It is extremely uneconomical to use it for short-term, low-speed operation.

Therefore, recently, a so-called thinned-out energization method has been used to easily control the frequency of direct induction motors.

One of the thinning energization methods described above involves inserting a bidirectional switching element between the three-phase AC power supply and the three-phase induction motor, and controlling the element to turn on as appropriate to control the motor to 1/(n) of the power supply frequency. There is a method of applying a low frequency voltage of 6n±1 (integer).

However, this method requires a ring counter with six times the number of stages as the reduction ratio, so for example, if the reduction ratio is 13 (n=2
) would require a ring counter with as many as 78 stages, which is impractical.

Therefore, a control device has been proposed in which a ternary ring counter is combined with a 6n±1-stage ring counter to reduce the number of stages of the ring counter. The equipment is complicated.

Furthermore, in all of the conventional examples described above, since the unique output of the ring counter is given to the switching element, the first power supply synchronization signal input after power-on is identified and 6n±
This has the disadvantage that an initial setting device must be added to set the one-stage ring counter or the ternary ring counter to a desired initial state, which further complicates the device.

An object of the present invention is to propose a speed control device for an induction motor that eliminates the above-mentioned conventional drawbacks.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a block circuit of the present invention, R, S.

T is three-phase AC power supply, M is three-phase induction motor, ut v
tW is the armature winding, TI, T2. T3 is a bidirectional switching element (hereinafter referred to as SIRISK) such as a triac.

A is 6 same voltages corresponding to the positive and negative line voltages of the power supply.

A synchronization signal generator that outputs a synchronization signal a, B is a synchronization signal a
and the output d of the hexadecimal ring counter D to output a reference signal S. The n frequency divider E logically combines the outputs of the hexadecimal ring counter D to set 6n 1/2 cycles of the power supply voltage as one period, and ? A separate reference signal generator that outputs three separate reference signals e having convex phase differences in width, F is an ignition phase adjuster, and G is an output f of the ignition phase adjuster F. .

This is an ignition pulse generator that logically combines the force e and the ignition pulse g to provide an ignition pulse g for the thyristors T1 to T3.

In the present invention, reference signal generator B, 1 frequency divider C and 6
The hexadecimal ring counter D is connected in a ring, and the position corresponds to the output of the hexadecimal ring counter D.

Since the phase synchronization signal is selected, no matter what output state the hexadecimal ring counter D is in when the power is turned on, the synchronization signal corresponding to the output state is automatically selected and the synchronization signal, that is, the power supply voltage The corresponding switching element is ignited to start the motor without delay.

It is possible to do so.

Therefore, in the present invention, it is not necessary to set the initial state of the hexadecimal ring counter each time the motor is started.

FIG. 2 shows details of the ignition control circuit of FIG.

The synchronous pulse generator A consists of three circuits of the same configuration connected between each line of the power supply.

To explain the circuit connected to the power supplies T and H, the photocoupler 1 and the resistors 2 and 3 generate a signal that is synchronized with the line voltage V (Fig. 3 ■) and has the same phase as the inverted voltage of the line voltage ■. , resistors 4 and 5, and an inverter 6.7, the Schmitt circuit shapes the signal and converts it into line voltage T-R and 1.
A synchronizing signal a3 having a phase difference of 80 degrees is generated, and an inverter 8 converts the signal a3 into a synchronizing signal a6 having the same phase as the line voltage TR.

Similarly, for the line voltages R-3 and S-T, synchronization signals a1. a2, and an in-phase synchronization signal a4. Generate a5.

Figure 3 shows the signal waveforms of each part when n=2, and shows a1 to
a6 is a rectangular wave signal corresponding to the positive or negative line voltage of the power supply.

In FIG. 2, the reference signal generator B consists of six AND elements 9 to 14 and an OR element 15.
Reference numeral 4 inputs one signal of synchronization signals a1 to a6 and one output of a hexadecimal ring counter D to be described later, and outputs the AND signal, that is, the reference signal S, from the OR element 15.

Next, a reference signal generator B, a 1/n frequency divider (n-2) C, and a hexadecimal ring counter (hereinafter simply referred to as a counter)
The combined operation with D will be explained.

Assuming that the content of counter D is O at a certain point in time, the output of terminal 0 is at H level, and the other terminals 1 to 5 are at L level, only AND element 13 opens and passes signal a3, and O
The output of R element 15 is at H level from time t1 to t2.
It becomes L level from t2 to t3 (Fig. 3b).

This output signal S is input to the frequency divider C, but since it is the first input signal, the output of the frequency divider C does not change, and therefore the contents of the counter D do not change.

Next, at time t3, when the signal a3 becomes H level again, the signal a3 passes through the AND element 13 and the OR element 15 and is input to the frequency divider C as a second signal, and a signal is output from the divided frequency C. to set the contents of counter D to 1.

That is, terminal 0 becomes L level and terminal 1 becomes H level.

As a result, AND element 13 is closed, and AND element 1 is instead closed.
0 is open, and the signal a4 is input to the frequency divider C from time t3 to time 14, and becomes L level at time t4.

Next, at time t, the signal a4 becomes H level, but since this becomes the first input signal to the frequency divider C, the output of the frequency divider C does not change.

When the signal a4 becomes L level at time t6 and then becomes H level at time t7, frequency divider C outputs and the content of counter D becomes 2.

That is, terminal 1 becomes L level and terminal 2 becomes H level, AND element 10 is closed and AND element 11 is opened.

Therefore, signal a2 is input to frequency divider C from time t7.

Thereafter, such operations proceed one after another, and the OR element 15 outputs a reference signal in which an H level period of π and 200π alternates with an L level period of π at the phase angle of the power supply voltage.

Frequency divider C outputs a signal every time the 100π H level appears. ,
7C, and from terminals 0 to 5 of the counter D, signals dO to d5 whose phases are shifted by just π by 5 with a width of Tπ1 are generated.

The phase-specific reference signal generator E includes three OR elements 16°, 17.
18, and the OR element 16 receives the signal dO.

dl, d3. The OR element 17 converts the logical sum signal e1 of d4 into signals di, d2 . d4. d5, and the OR element 18 receives the OR signal e2 of the signal d2. d3. d5. The OR signal e3 of dO is outputted as 1-ffL.

Signals el, e2. e3 is electric 11
4π.

There is also a difference in the traces of each trace over a period of one period, which corresponds to one cycle of the source voltage.

The three-ignition phase adjustment device F includes an inverter 9, a mono-multivibrator 20, a variable resistor 21, a resistor 22, a capacitor 23, an inverter 24, and an AND element 25.

The mono multi-bi break 20 inputs the reference signal f1 inverted by the inverter 19 and produces a Q output f2 having a width determined by the resistor 21.

Further, the inverter 24 generates an inverted signal f3 whose phase is delayed by α from the signal f2 by a time constant determined by the resistor 22 and the capacitor 23, and the AND element 25 generates a logical product signal of the signals f2 and f3, that is, a firing phase adjustment signal f4. occurs.

Therefore, by adjusting the resistor 21, the phase angle α of the signal f4 can be changed.

Ignition pulse generator G includes AND elements 26, 27°28
and a resistor 261 and a transistor 262 connected to each element.
, an amplifier consisting of a pulse transformer 263, and A
ND elements 26, 27.28 respectively receive signals e1 and f4,
By inputting e2 and f4, e3 and f4, the signal g1. g2. g
Generates 3.

These signals gl, g2. If g3 is amplified by the amplification device and the cyrisks TI, T2, and T3 are fired, the electric motor M will have hl, h2, and h2. A thinning voltage of h3 is applied.

The fundamental wave of the voltages h1 to h3 is a low frequency alternating current voltage of the power supply frequency T]-1, which causes the motor M to rotate at a low speed approximately 100 times lower than the rated speed.

FIG. 4 is an operating waveform diagram when the division ratio of the frequency divider C is set to 1, where b represents the reference signal, C represents the frequency divider output, and dO to d5 represent the outputs of the counter D.

Further, e1 to e3 are phase-specific reference signals, which are - of the power supply voltage.
Each pulse has a width of one cycle, and has a phase difference of 2" from each other.

fl is an inverted signal of the reference signal S, and f4 is an ignition phase adjustment signal, which is a pulse delayed by a phase angle α determined by the variable resistor 21 from the falling point of the reference signal S.

g1 to g3 are AND signals of signals e1 to e3 and signal f4, and when ignition of thyristors T1 to T3 is controlled by the amplified signal, voltages shown in h1 to h3 are applied to motor M, and its fundamental wave voltage is a three-phase AC voltage with a low frequency of 100 times the power supply frequency, and rotates the electric motor M at a low speed almost above the rated speed.

FIG. 5 is an operational waveform diagram when the division ratio of the divider C is set to 3, and the same reference numerals as in FIG. 3 indicate corresponding waveforms of the same type.

The voltages hh1 to h3 applied to the electric motor M include low frequency components of the power supply frequency.

Star. 51817 Ru.

The present invention is as described above, and has a power supply frequency of 1
1/6n-1 as a speed control device when operating at low speed with a low frequency voltage of 1/6n-1.

By simply changing n of the divider, other circuits can be used in common, which has the advantage of being highly flexible.In addition, a hexadecimal ring counter with a small number of stages is sufficient as a ring counter, so the circuit configuration is very simple. This has the effect of making it easier.

Furthermore, in the present invention, the contents of the counter are always fed back and a reference signal is generated by selecting a power synchronization signal according to the contents of the counter, so that the control device immediately operates no matter when the power is turned on. Since it is possible to enter the state and an initial setting device as in the conventional example is not required, there is an effect that the entire device can be significantly simplified.

[Brief explanation of drawings]

Figure 1 is a block circuit diagram of an embodiment of the present invention, Figure 2 is a logic circuit diagram, Figure 3 is an operation waveform diagram of each part of the circuit when the division ratio n is 2, Figures 4 and 5. are operation waveform diagrams of various parts of the circuit when n is 1 and 3, respectively. TI, T2, T3... Bidirectional switching element/element, M... Three-phase induction motor, B...
・Conductivity signal generator, C...1 frequency divider, D...
... Hexadecimal ring counter, E ... Phase-specific reference signal generator, F ... Firing phase adjuster, G ...
...Ignition pulse generator.

Claims (1)

[Claims] 1. A hexadecimal ring operated by the output of a 1 frequency divider (n is an integer) in a speed tell device for a three-phase induction motor supplied with power from a three-phase AC power source via a bidirectional switching element. a reference signal generating device that sequentially selects a plurality of synchronization signals corresponding to the positive and negative of the line voltage of the power supply based on the output of a counter to generate a reference signal and operates a frequency divider by 1 using the reference signal; a firing phase regulator for generating a firing phase adjustment signal with an adjustable delay phase relative to the firing phase adjuster;
The 60-1/2 cycle of the power supply is reduced to 1 by the OR combination of a plurality of outputs selected from among the outputs of the leading ring counter.
A phased reference signal generator that outputs three phased reference signals having a phase difference of &3 from each other with a period width of −π, and a logic between the phased reference signals and the ignition phase adjustment signal. 1. A speed control device for an induction motor, comprising a firing pulse generator that outputs a product signal as a firing signal for a bidirectional switching element.