JPS58205239A - １チツプマイクロコンピユ−タ - Google Patents

１チツプマイクロコンピユ−タ

Info

Publication number
JPS58205239A
JPS58205239A JP57088991A JP8899182A JPS58205239A JP S58205239 A JPS58205239 A JP S58205239A JP 57088991 A JP57088991 A JP 57088991A JP 8899182 A JP8899182 A JP 8899182A JP S58205239 A JPS58205239 A JP S58205239A
Authority
JP
Japan
Prior art keywords
memory
internal
signal
request signal
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57088991A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6225217B2 (enrdf_load_stackoverflow
Inventor
Jun Koike
純 小池
Hidetoshi Kosaka
小坂　秀敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57088991A priority Critical patent/JPS58205239A/ja
Publication of JPS58205239A publication Critical patent/JPS58205239A/ja
Publication of JPS6225217B2 publication Critical patent/JPS6225217B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Bus Control (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
JP57088991A 1982-05-26 1982-05-26 １チツプマイクロコンピユ−タ Granted JPS58205239A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57088991A JPS58205239A (ja) 1982-05-26 1982-05-26 １チツプマイクロコンピユ−タ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57088991A JPS58205239A (ja) 1982-05-26 1982-05-26 １チツプマイクロコンピユ−タ

Publications (2)

Publication Number Publication Date
JPS58205239A true JPS58205239A (ja) 1983-11-30
JPS6225217B2 JPS6225217B2 (enrdf_load_stackoverflow) 1987-06-02

Family

ID=13958269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57088991A Granted JPS58205239A (ja) 1982-05-26 1982-05-26 １チツプマイクロコンピユ−タ

Country Status (1)

Country Link
JP (1) JPS58205239A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6152765A (ja) * 1984-08-21 1986-03-15 Mitsubishi Electric Corp ワンチツプマイクロコンピユ−タ

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157325A (en) * 1981-03-25 1982-09-28 Fujitsu Ltd Microcomputer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57157325A (en) * 1981-03-25 1982-09-28 Fujitsu Ltd Microcomputer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6152765A (ja) * 1984-08-21 1986-03-15 Mitsubishi Electric Corp ワンチツプマイクロコンピユ−タ

Also Published As

Publication number Publication date
JPS6225217B2 (enrdf_load_stackoverflow) 1987-06-02

Similar Documents

Publication Publication Date Title
JPH01226066A (ja) ディジタル信号処理プロセッサ
JPH0636313B2 (ja) デユアルアクセスシングルチツプ集積回路デイジタル記憶装置
US6366973B1 (en) Slave interface circuit for providing communication between a peripheral component interconnect (PCI) domain and an advanced system bus (ASB)
JPS6016998Y2 (ja) 計算装置の間のデ−タ転送を遂行する装置
JP2001184225A (ja) エミュレータ及びエミュレート方法
JPS58205239A (ja) １チツプマイクロコンピユ−タ
US6510483B1 (en) Circuit, architecture and method for reading an address counter and/or matching a bus width through one or more synchronous ports
GB2013006A (en) Data processing system using a high speed data channel
JPH07182849A (ja) Ｆｉｆｏメモリ
JPS60246464A (ja) バツフア・メモリのデ−タ転送方式
JPS6349816B2 (enrdf_load_stackoverflow)
KR100356013B1 (ko) 암호처리를 위한 범용 프로세서와 암호처리 코프로세서의접속장치
KR19990040389A (ko) 버스 장치
JPH06131240A (ja) ランダムアクセスメモリ
JPH04160458A (ja) Ｄｍａコントローラ周辺回路
JPH01188970A (ja) データ転送装置のウエイト制御方式
JPH0652090A (ja) メモリ制御回路
JPS58186847A (ja) 内部デ−タバス制御回路
JPH0375945A (ja) データ処理装置
JPH06266638A (ja) 半導体記憶装置
JPH01126744A (ja) データ処理装置
JPS59103152A (ja) マイクロプロセツサ制御回路
JPH03189755A (ja) メモリ間転送装置
JPH0454651A (ja) 周辺プロセッサの接続方式
JPH03250343A (ja) Ｔｌｂ制御方式