JPS58198937A - デイジタルデ−タ伝送の同期補正方式 - Google Patents

デイジタルデ−タ伝送の同期補正方式

Info

Publication number
JPS58198937A
JPS58198937A JP57082630A JP8263082A JPS58198937A JP S58198937 A JPS58198937 A JP S58198937A JP 57082630 A JP57082630 A JP 57082630A JP 8263082 A JP8263082 A JP 8263082A JP S58198937 A JPS58198937 A JP S58198937A
Authority
JP
Japan
Prior art keywords
data
bit
bits
shift register
valid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57082630A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6365251B2 (enExample
Inventor
Seiichi Saito
斎藤　精一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57082630A priority Critical patent/JPS58198937A/ja
Publication of JPS58198937A publication Critical patent/JPS58198937A/ja
Publication of JPS6365251B2 publication Critical patent/JPS6365251B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP57082630A 1982-05-17 1982-05-17 デイジタルデ−タ伝送の同期補正方式 Granted JPS58198937A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57082630A JPS58198937A (ja) 1982-05-17 1982-05-17 デイジタルデ−タ伝送の同期補正方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57082630A JPS58198937A (ja) 1982-05-17 1982-05-17 デイジタルデ−タ伝送の同期補正方式

Publications (2)

Publication Number Publication Date
JPS58198937A true JPS58198937A (ja) 1983-11-19
JPS6365251B2 JPS6365251B2 (enExample) 1988-12-15

Family

ID=13779762

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57082630A Granted JPS58198937A (ja) 1982-05-17 1982-05-17 デイジタルデ−タ伝送の同期補正方式

Country Status (1)

Country Link
JP (1) JPS58198937A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62159555A (ja) * 1986-01-07 1987-07-15 Nec Corp 調歩同期式デ−タ変換回路
US5155637A (en) * 1985-06-03 1992-10-13 Canon Kabushiki Kaisha Data transmission and detection system
JP2008028986A (ja) * 2006-06-21 2008-02-07 Matsushita Electric Ind Co Ltd 送信装置、受信装置、送信方法、受信方法及び集積回路

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5155637A (en) * 1985-06-03 1992-10-13 Canon Kabushiki Kaisha Data transmission and detection system
JPS62159555A (ja) * 1986-01-07 1987-07-15 Nec Corp 調歩同期式デ−タ変換回路
JP2008028986A (ja) * 2006-06-21 2008-02-07 Matsushita Electric Ind Co Ltd 送信装置、受信装置、送信方法、受信方法及び集積回路

Also Published As

Publication number Publication date
JPS6365251B2 (enExample) 1988-12-15

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