JPS58184748A - 半導体用リ−ドピンのろう付方法 - Google Patents

半導体用リ−ドピンのろう付方法

Info

Publication number
JPS58184748A
JPS58184748A JP57068208A JP6820882A JPS58184748A JP S58184748 A JPS58184748 A JP S58184748A JP 57068208 A JP57068208 A JP 57068208A JP 6820882 A JP6820882 A JP 6820882A JP S58184748 A JPS58184748 A JP S58184748A
Authority
JP
Japan
Prior art keywords
brazing
ceramic substrate
plated
lead
brazing material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57068208A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0214787B2 (enExample
Inventor
Hitoshi Tsuji
斉 辻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tanaka Kikinzoku Kogyo KK
Original Assignee
Tanaka Kikinzoku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tanaka Kikinzoku Kogyo KK filed Critical Tanaka Kikinzoku Kogyo KK
Priority to JP57068208A priority Critical patent/JPS58184748A/ja
Publication of JPS58184748A publication Critical patent/JPS58184748A/ja
Publication of JPH0214787B2 publication Critical patent/JPH0214787B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP57068208A 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法 Granted JPS58184748A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57068208A JPS58184748A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57068208A JPS58184748A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Publications (2)

Publication Number Publication Date
JPS58184748A true JPS58184748A (ja) 1983-10-28
JPH0214787B2 JPH0214787B2 (enExample) 1990-04-10

Family

ID=13367142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57068208A Granted JPS58184748A (ja) 1982-04-23 1982-04-23 半導体用リ−ドピンのろう付方法

Country Status (1)

Country Link
JP (1) JPS58184748A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008010336A (ja) * 2006-06-30 2008-01-17 Daihen Corp 路上設置形変圧器装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58119663A (ja) * 1981-12-31 1983-07-16 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン 接続ピンの結合方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58119663A (ja) * 1981-12-31 1983-07-16 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン 接続ピンの結合方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008010336A (ja) * 2006-06-30 2008-01-17 Daihen Corp 路上設置形変圧器装置

Also Published As

Publication number Publication date
JPH0214787B2 (enExample) 1990-04-10

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