JPS58182109A - Multitrack pcm recorder system - Google Patents

Abstract

PURPOSE:To minimize the number of data which become uncorrectable by distributing and recording PCM data on plural tracks and reducing a recording band per track. CONSTITUTION:The output of a counter 27 is inputted to a corrected-word generating circuit 22, decoder 29, and counter 28. The generating circuit 22 generates a corrected word according to the output of the counter 27. A P signal output 31 is connected to the data latch 23 of the 1st track and a Q signal output 32 is connected to the data latch 23 of the 8th track. Data latches 23 of respective tracks latch data or corrected works according to the output of the decoder 29. An error detection signal generating circuit 24 read data out of data latches 24 to generate an error detection signal on the basis of those data, outputting data and an error detection signal successively. An MPX26 performs switching between the output of the error detection signal generating circuit 24 and a synchronizing signal generated by a synchronizing signal generating circuit 25.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multi-track PCM recorder that distributes and records data to a plurality of tracks, and relates to a data distribution method that is resistant to errors.

A PC that converts analog signals into digital signals and records them.
M recorders require a much wider bandwidth than conventional analog recording recorders.

Therefore, it is necessary to take measures such as using a VTR with a wide recording band. A multi-track PCM recorder attempts to reduce the recording band per track by distributing and recording PCM data on a plurality of tracks.

FIG. 1 shows the recording pattern of a multi-track PCM recorder in the case of two tracks. On the magnetic tape l, data is distributed and recorded on eight tracks from - to D. IO is a synchronization signal, and // is an error detection signal.

Data f-IL channel and R channel data are alternately distributed in the track direction. This is a P and Qtd error correction word and is generated by six pieces of data in the track direction. For example, it is generated by six pieces of data from PO and QoViLo to R3. And 61m
An l block is formed by g words of data and one error correction word. Two correction words P and Q can correct up to one error within l block. During reproduction, errors are detected using the error detection signal //, and if there is an error, correction is performed using the above-mentioned correction word. If there are three or more errors in l block, correction becomes impossible. In this case, data interpolation is performed using previous value retention, average value interpolation, or the like. Considering such a case where the error cannot be stopped, if the number of errors is constant, it is preferable to say that the error occurs in the correction word rather than the data.

In other words, by arranging the correction word in a track where errors are likely to occur, the number of uncorrectable data will be reduced. For example, 7 from Lo? , , -4, and a block consisting of Po and Qo, consider the case where 3 words have an error Kfi, Lo, Ro, R,
When is 2-, ijj data become uncorrectable, but R
, , PO, and Qo are in error, only one piece of data becomes uncorrectable.

An object of the present invention is to provide a data distribution method that reduces the number of uncorrectable data.

By arranging error correction words in tracks at both ends of the tape where most errors occur, the number of uncorrectable data can be reduced.

FIG. 2 shows an example of a recording pattern in the case of one track according to the present invention. Hereinafter, the present invention will be explained in detail with reference to FIG.

In magnetic tape recording, dropouts occur most frequently at the edges of the tape. Normally, the track finish at the end of the tape 2
- The rate is about 1 order of magnitude worse than the center of the tape, Rinoko 2-Ray) K. Therefore, the error rate of the first track and the first track is 10'', and the error rate of the other tracks is 70'.In this case, the probability of uncorrectability for each track is If we calculate the probability that the data of one or more other tracks in the same book will have an error,
1st)? track and the first track are 2j
It's more than twice as bad. Therefore, as shown in FIG. 1, by arranging correction words P and Q, which are unnecessary when correction is impossible, in the tracks at both ends, the probability that data becomes uncorrectable is reduced. #I/Compared to the case in Figure 2, the probability that the data becomes uncorrectable is approximately //g in the case of Figure 2.

FIG. 3 shows a recording circuit of the present invention. In the same figure, Kokoha correction word generation circuit, Ko3#'i data latch, -4t
I/I engineering 2 - detection signal generation circuit, = 3 is synchronization signal generation circuit 1.26 is MPX, λ and 2jFi counter,
9 and 30 are decoders. Also, /CoFiPCM
Data input, /3Fi clock input, /II~, 2/ are recording signal outputs of the first to fifth tracks. clock/
3 is a counter 27 that is synchronized with PCM data/2.
is driving. This counter 7 is a hexadecimal counter, and its output is input to the correction word generation circuit here, the decoder 29, and the counter t.

A correction word generation circuit 22 generates a correction word according to the output of the counter 7. That is, six pieces of data are read in sequence from 10m to j'' when the output of the counter core becomes j'', and when the six pieces of data have been read, correction words P and Q are output.The P signal output 37 is 1
Track data latch, 2. The three nc1Q signal outputs are connected to the data latch 23 of the first track. The data latch-3 of each track latches data or correction words according to the output of the decoder. That is, when the output of the counter 7 is @θ" to "D1, data is latched sequentially from the 1st track to the 6th track, and --
Then, the sixth data is latched in the seventh track, and the correction words P and Q are latched in the first track. In this way, l block data shown in FIG. 1 is formed. , 2q ~, 2 O part is the above l
This is the part that adds an error detection signal and a synchronization signal to the block data to generate the recording signal shown in FIG.

In the error detection signal generation circuit, 24t, the day latch,
2, generates an error detection signal based on the data, and sequentially outputs the data and error detection signal. 〃In ×Coro, this error detection signal generation circuit,
2+ output and the synchronization signal generated by the synchronization signal generation circuit 25. The counter 2g is driven by a clock 33 synchronized with the recording signal, and the output of this counter is decoded by a decoder 30 to generate a control signal for controlling the portion of K = 6.

Thus, by using the recording circuit shown in FIG. 3, the recording signal pattern shown in FIG. 1 can be realized.

In the reproducing circuit, the operation that is the reverse of the recording operation may be performed. That is, after error detection is performed on each track, the data on each track is returned to serial data, and then error correction is performed.

According to the present invention, when errors increase and errors become uncorrectable, the number of pieces of data that become uncorrectable can be minimized.

[Brief explanation of drawings]

FIG. 1 is a diagram of a conventional recording pattern, FIG. 2 is a diagram of a recording pattern of the present invention, and FIG. 3 is a block diagram showing a recording circuit of the present invention. Coco... Correction word generation circuit 23... Data latch, 24I... Error detection signal generation circuit, 2j... Synchronization signal generation circuit Koku, Kog... Counter koku, 30... Decoder agent Patent Attorney Usui 1) Toshiyuki

Claims (1)

[Claims] Distributing and recording digital signals to multiple tracks 5
In a PCM recorder system, there is an error correction code generation circuit that divides a PCM signal into certain blocks and adds an error correction code to each block, and a recording signal consisting of the PCM signal and the error correction code generated by the circuit. Among these, there is a data distribution circuit that distributes the recording signal to each track so that the error correction code is recorded on the track at the end of the tape where the error rate is poor, and a circuit that adds an error detection signal and a synchronization signal to the recording signal in each track. A multi-track/PCM recorder system that is characterized by