JP2576551B2 - Data recorder - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data recorder which records and reproduces data sent from a computer or the like using a rotary head type digital audio tape recorder (DAT).

[Summary of the Invention]

The present invention relates to a data recorder which records and reproduces data from a computer or the like in accordance with a DAT format by using a DAT, and which is a DAT format.
Data is recorded on two inclined tracks forming a frame, a unit including a plurality of arbitrary frames is set, a frame number which is continuous in the unit, and a signal indicating that the frame is the last frame of the unit. By recording the above, the length of the unit can be freely changed,
The signal processing can be easily performed.

[Conventional technology]

2. Description of the Related Art In a computer, in order to protect (back up) data written on a hard disk or the like, such data is transferred to a data streamer (data recorder) once a day and recorded.

As a conventional data recorder, a normal analog audio tape recorder has often been used. However, in such an analog tape recorder, the consumption of the magnetic tape becomes extremely large, and since the data rate at the time of recording is low, it takes a very long time to transfer and record. Cannot be easily performed.

Therefore, it has been considered to use a digital audio tape recorder, a so-called DAT, based on a helical scan method using a rotating head, which has been commercialized in recent years, as a data recorder. When a DAT is used as a data recorder, data from a host computer is converted into a DAT format and recorded. In the DAT format, two inclined tracks formed when two heads having different azimuths make one rotation are defined as one frame, and 16-bit PCM audio data is interleaved and recorded in units of one frame. , Auxiliary sub-data is recorded. In that case,
As will be described later, each track has a main area where PCM data is recorded and a sub area where sub data is recorded.

In addition, in DAT, when recording another signal on a recorded tape, generally, without using an erase head,
By recording a new signal by so-called double writing, the previous signal is erased. Therefore, for example, if the head momentarily leaves the tape or double writing is not performed normally due to head clogging, etc., the previous signal remains unerased, which is a cause of data error called so-called drop-in. Becomes As a countermeasure, in the DAT format, an error detection code is added to each of the main area and the sub area of each track to be recorded, and if a part of the track remains unerased, it is detected as an error. I have to.

[Problems to be solved by the invention]

When data from a computer is recorded by a data recorder, signal processing becomes easier if some breaks can be known for each predetermined amount of data.

 The present invention has been made in view of the above requirements.

[Means for solving the problem]

In the present invention, a unit composed of an arbitrary plurality of frames is set, and a frame number that is continuous in the unit and a signal indicating that the frame is the last frame of the unit are recorded.

[Action]

The length of the unit can be freely selected, and signal processing can be easily performed.

〔Example〕

FIG. 1 shows a configuration in the case of using a DAT as a data recorder, where 1 is a DAT, 2 is an interface bus,
3 is a host computer, and 4 and 5 are inner buses. DAT1 is a recording / reproducing unit 6, a recording amplifier 7, a reproducing amplifier 8, a signal processing circuit 9, a RAM 10, a data controller 11,
Interface board 12, system controller 13,
It is mainly composed of a servo and motor drive circuit 14 and the like.

The system controller 13, the signal processing circuit 9, and the data controller 13 are connected to an absolute frame number AFN described later.
O, check data, a mode instruction, a logical frame number LFNO, a determination result based on the check data, and a predetermined signal such as a data transfer instruction are transmitted and received.

The recording / reproducing unit 6 is provided with a rotating head drum (not shown), and the magnetic tape is wound around a range of about 90 degrees around the drum and transferred by a capstan. This drum has different azimuth angles A,
B2 heads are provided, and two inclined tracks are recorded and reproduced on the tape by one rotation of the drum.

Digital data supplied from the host computer 3 via the buses 5, 2, and 4 is transmitted to an interface board.
The data is input to the DAT 12 and further subjected to predetermined signal processing in the data controller 11, the RAM 10, the signal processing circuit 9 and the like in accordance with an instruction from the system controller 13, thereby performing the above-described conversion into the DAT format. The formatted signal is supplied to the recording / reproducing unit 6 through the recording amplifier 7 and is recorded on the magnetic tape by the heads A and B.

The signals recorded on the magnetic tape are reproduced by the heads A and B, and the reproduced signals are supplied to a signal processing circuit 9 through a reproduction amplifier 8, where the digital data obtained by inverse conversion is taken out by a data controller 11, an interface It is supplied to the host computer 3 through the board 12 and the buses 4, 2, and 5.

In the above apparatus, the format of the DAT recorded on the magnetic tape is as shown in FIG.

In FIG. 2, two inclined tracks T _A and T _B are formed on the tape 15 from below as shown by the arrow a in FIG. The two tracks T _A, 1 frame is composed of T _B. One track T _A (or T _B ) is composed of 196 blocks, and one block is composed of 288 bits. Of these, 34 blogs at both ends become sub-areas, and 128 blocks at the center become main areas.

The sub-area is further divided into several sections.
That is, from the lower end of the track, a margin portion, a preamble portion for PLL of a subcode, a first subcode portion, a postamble portion, a gap portion of a block portion, a tracking (ATF) signal portion, a gap portion between blocks, Data PLL
Preamble portion, inter-block gap portion, ATF signal portion, inter-block cap portion, sub-code PLL preamble portion, second sub-code portion, post-amble portion,
A margin portion is provided. Of these, the first and second subcode sections are each composed of eight blocks, and the other parts are each composed of a predetermined number of blocks. still,
The length scale in the figure is not accurate.

The main area is composed of 128 data blocks, and one block is composed of 8 bits each of a synchronization signal, W of PCM-ID, a part, a block address, and a parity from the head of the block, as shown in FIG. The main data is arranged in the next 256-bit period. When handling an audio signal, the main data is 16-bit PCM data for each of the L channel and the R channel. These 16-bit main data consist of two tracks T _A , T
_It is interleaved in the main area of _B (one frame) and arranged with parity. In this case, approximately 5760 bytes of data are recorded in the main area of one frame. When used as a data recorder, the data sent from the host computer 3 is converted into 16-bit data and treated in the same manner as the PCM data, and these data are formatted as shown in FIG. Recorded in the main area of the frame.

That is, in FIG. 4, the above-mentioned 5760 bytes are formed into words (0 to 1439) of 4 bytes (32 bits), and each of these words has 16 bits (2 bytes) in accordance with the audio signal. It is divided into an L channel and an R channel. And in this format,
First, a synchronization part is provided in three words (12 bytes), the first one byte of this synchronization part is all "0", the following ten bytes are all "1", and the last one byte is all "0". "
To be.

Next, an 8-word (32-byte) header section is provided. The 4 bits on the MSB side of the first byte of the L channel of word 3 in the header portion are used as the format ID indicating the format of the data decoder,
The bit is undecided. The remaining three bytes of this word 3 are used as a logical frame number (LFNO) area, which will be described later. The LFNO consisting of these 8 bits makes it possible to convert the binary values indicating the serial numbers 1 to 23 of the frame into, for example, 23 frames as one unit. Provided.

Then, a data portion of a total of 5728 bytes is provided in the subsequent words 7 to 1438, and a data signal from the host computer 3 is sequentially provided by 4 bytes in each word.

Further, the word 1439 is used as an error detection code (EDC) part, and an error detection code (EDC) is generated for each of the data signals in the header part and the data part described above for a data string in which each data bit is viewed in a vertical direction. Provided.

Here, in the DAT format, the data of the L channel and the data of the R channel are alternately distributed to two tracks by 2 bytes and recorded. For example, tracks are formed on both sides of the drawing. The heads A and B are shown as azimuths (±).
Therefore, as described above, by generating EDC for a data string in which each data bit is viewed in the vertical direction, EDC can be generated for two tracks forming one frame.

Therefore, according to this format, it is possible to determine whether the main area remains unerased by performing the EDC operation. That is, in the above-mentioned format, if one track remains unerased, every other data for generating the EDC will be different, and the EDC calculation will not be performed correctly. Therefore, by detecting this value, it is possible to determine the remaining erase.

Next, the logical frame number LFNO
It will be described with reference to the drawings.

As described above, LFNO is obtained by assigning serial numbers 1 to 23 to each frame, for example, with 23 frames as one unit. That is, 1 to 23, 1 to 23 every 23 frames.
Will be repeated. In FIG. 5, the entire LFNO is composed of 8 bits, of which
The MSB must be the last frame of the unit,
When the unit is 23 frames, a last frame ID (LASTF-ID) indicating the 23rd frame is used.
The next one bit of the MSB is an ECC frame ID (ECCF-ID) indicating that the frame is an ECC frame for error correction, and the next six bits represent LFNO of 1 to 23. Therefore,
LFNO is selected from the range of 1 to 64 by
You can choose any length other than 23 frames. In that case, it can be known from the LASTF-ID that the frame is the last frame of the unit. Also ECCF
The ID may be multiplexed not only in one frame but also in a plurality of frames.

By using such units with LFNO,
The boundaries of the data at predetermined intervals become clear, and signal processing becomes easy. Further, by changing the maximum value of LFNO and selecting an appropriate length of the unit, signal processing can be performed more easily.

Next, the data configuration of the first and second subcode portions in the subarea will be described.

The first and second sub-code sections are each composed of eight sub-code blocks, each of which can record 2048-bit data.

FIG. 6 shows the structure of a sub-code block. After an 8-bit synchronization signal, W ₁ , W ₂ , and parity are arranged, 256-bit sub-code data including parity is arranged. This subcode data is composed of four packs, and one pack is composed of 8 × 8 bits (8 symbols).

The contents of W ₁ and W ₂ are different between the block with the block address of EVEN and the block with the ODD, and pack numbers (1 to 7) are assigned to the EVEN block and the ODD block as shown in the figure. . Also in the eighth pack is provided with a C ₁ code for error detection.

W ₁ of the EVEN block are each 4-bit control code (CTL-ID), consists all zero code, W ₂ is "1" in the upper one bit, consists format ID, 4 block address bits of 3 bits. W ₁ of the ODD block is
4-bit program number code (PNO-2, PNO
NO-3) consists, W ₂ is "1" in the upper one bit, 3-bit blog ram number code (PNO-1), is made from the block address of 4 bits.

Each of the packs 1 to 7 is divided into 8 words of 8 bits. Each word includes, for example, a code indicating a lead-in area of a recording start portion on a tape, a code indicating a lead-out area of a recording end portion, Various types of codes such as codes indicating recording date and time, absolute frame numbers, logical frame numbers, and so on are provided together with the parity.

FIG. 7 shows the configuration of pack 3 as an example of the seven packs.

This pack 3 consists of eight 8-bit words PC1-8
Consists of The upper 4 bits of PC1 are provided with a pack number (here, “0011” indicating pack 3), and the lower 4 bits are provided with a format ID. PC2 is an undecided part. The upper four bits of PC3 are provided with an area ID indicating the lead-in area or lead-out area. The absolute frame number (AFNO) is represented by a total of 20 bits including the lower 4 bits of PC3 and PC4 and PC5. This AFNO is a serial number assigned to all frames recorded on one tape. Next, a total of 16 for PC6 and PC7
The check data CD according to the present invention is provided by bits, and the PC8 is provided with parity for PC1 to PC7.

The 16-bit check data CD took exclusively theoretical sum of all the data present in the main area provided on one track of the pack 3 is provided (T _A or T _B) (data from the computer) Things. Alternatively, an error detection signal such as a CRC for all data existing in the main area may be used as the check data CD.

This check data can also be provided in undetermined portions of the other packs PC1 and PC2 to PC7 and overwritten to increase reliability. In this case, the first track and the second subcode section of 8 blocks are provided for each track, and there are 7 packs of 2 blocks. Therefore, a maximum of 56 pieces of the same check data CD are recorded on one track. be able to.

Such check data CD is used as follows.

At the time of reproduction, the check data CD read from one track is compared with the exclusive OR of the data read from the main area of that track. As a result, if they do not match, it is determined that either the entire main area has been erased or the entire sub-area has been erased (the previous check data CD has also been erased). can do. If the two match, it can be determined whether both the entire main area and the entire sub-area are correct or both are incorrect. In order to know which of the main area and the sub area is correct or incorrect, it can be determined by the following method using LFNO and AFNO.

FIG. 8 shows the order of the judgment, and the steps S1 to S4
9 is determined based on the determination by the user, and the contents of the determination in FIG. 10 can be known based on the determination criterion.

In FIG. 8, first, it is checked in step S1 whether data in the main area (hereinafter referred to as main date) has been corrected by the C ₁ and C ₂ codes. If the correction could not be made, it is determined that there is a dropout in the main data of the track, and a message to that effect is sent as C in FIG. Next step when correction is possible
In S2, the continuity of LFNO in the main area is checked. If there is no continuity, it is determined to be B in FIG. 10 and it is determined that a drop-in has occurred on the track, and a message to that effect is sent. When the LFNO has continuity, the check of the main area is finished, and then the sub area is checked in step S3. For pack data of the sub-area, C ₁ code correction, pack parity, checks the reproducibility of the pack data by multiple match or the like. If this check cannot be made, it is determined to be (5) in FIG. 10, and it is determined that there is a drop-in in the sub-area data (sub-data) and the main data is correct. When the reproducibility check is completed, the continuity of the AFNO and the main data are checked by the check data CD in step S4. Based on the results of each check, the judgment criteria shown in FIG. 9 are obtained. The contents of the judgment in FIG. 10 are obtained based on the judgment criteria.

 The content of each judgment is as follows: A- (1) The main data is correct.

A- (2): Both main data and sub data have drop-ins.

A- (3): There was a drop-in in the main data.
AFNO continued in every corner.

A- (4)... There was a drop-in in the sub data. In this case, make AFNO self-propelled and the main data is correct.

A- (5): There was a dropout in the sub data.
In this case, the AFNO will run on its own and the main data will be correct.

It should be noted that a flag is set when drop-in is detected by the check data CD, and error correction can be performed by the error correction code ECC based on this flag. Further, in order to prevent the reading error of the check data CD and the data of the main area, detection by the check data CD may be performed a plurality of times.

〔The invention's effect〕

According to the present invention, the division of a predetermined amount of data is clarified by the unit, and the length of the unit is changed by arbitrarily selecting LFNO from, for example, 1 to 64 and changing the size of the predetermined amount. Thus, signal processing can be easily performed. The last frame of the unit can be known from the LASTF-ID.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG.
FIG. 3 shows a data structure of a main data block, FIG. 4 shows a data structure of a main area of one frame, FIG. 5 shows a data structure of a logical frame number, and FIG. FIG. 7 is a data structure diagram of a pack of a subcode block, FIG. 8 is a flowchart showing an error determination method,
FIG. 9 is a diagram showing an error judgment criterion, and FIG. 10 is a diagram showing the contents of the judgment. In still code used in the drawings, a T _A T _B ...... track 1 ...... DAT 3 ...... host computer 13 ...... system controller LFNO ...... logical frame number.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Tatsuya Iijima 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Hiroshi Ishibashi 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Kentaro Odaka 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (56) References JP-A-63-161582 (JP, A) JP-A-63-63 160074 (JP, A) JP-A-61-287080 (JP, A) JP-A-61-54078 (JP, A) JP-A-62-77466 (JP, U)

Claims (1)

(57) [Claims] 1. A rotation of a rotary head on a recording medium by one rotation.
The two inclined tracks are formed as one frame, and data having a predetermined data format is recorded for each frame, and a unit including an arbitrary plurality of frames is formed. A data recorder which sets and records a continuous frame number within the unit and a signal indicating the last frame of the unit.