JPS61237267A - Digital magnetic recording device - Google Patents

Abstract

PURPOSE:To independently record a signal on a specific track or the group of tracks without increasing the number of head terminals and the capacity of a power source by extracting a track synchronous signal and the group of recording command signals from an inputted control signal and recording the signal on the track or the group of tracks by the group of recording command signals. CONSTITUTION:When a control signal is inputted from an input terminal 25, a signal is outputted from a shift register 26 synchronously with the rise edge of a clock inputted from an input terminal 23. An AND gate 27 goes to H level, a recording command signal inputting to input terminals I1-I3 of a latch 28 is latched and outputted from output terminals Q1-Q3. A synchronous signal outputted from the AND gate 27 is successively shifted to output terminals Q1-Qn of a shift register 30. And gates 19-22 receive the outputs of the shift registers 28, 30 and input successively the signal of H level to amplifiers 15-18. The amplifiers 15-18 input digital signals from an input terminal 24 through a shift register 31 and drive recording heads 11-14 to record the signal to the group of the tracks.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a digital magnetic recording apparatus that records digital signals on a magnetic recording medium such as a magnetic tape using a multi-track recording head.

BACKGROUND OF THE INVENTION Recently, attempts have been made to digitally record stereo audio using a fixed head system using a compact cassette, but due to recording density, it is difficult to record digitally with magnetic tape.
) are distributed to racks and recorded. Furthermore, attempts are being made to add auxiliary track groups such as tape position search tracks and still image recording tracks in addition to the audio signal track groups.

By the way, as a method of recording on these track groups,
Some devices integrate a recording head, a recording circuit, and a recording circuit, supply digital signals serially to the head terminal, and perform pulse train recording. The conventional digital magnetic recording device as described above will be explained below with reference to one drawing.

FIG. 3 shows an embodiment of a conventional digital magnetic recording device. In FIG. 3, 1, 2, and 3 are the first of a group of n recording heads, respectively.

Recording heads corresponding to the second and nth tracks.

Numerals 4, 5, and 6 are power amplifiers that respectively drive the recording heads 1, 2, and 3 of a group of n power amplifiers. Note that each power amplifier group has an output control terminal, and only when an H level signal is input to these output control terminals, the above power amplifier group responds to the recording head group. It shall be driven.

7 is an input terminal to which a clock is input; 8 is an input terminal to which a digital signal to be recorded is input in synchronization with the rising edge of the clock, and is connected to each input of the power amplifiers 4, 5, and 6. ing. In addition.

The digital signal input from the input terminal 8 constitutes one block with n bits, and each block has 1, 2, .
3. ......, the nth bit is 1,2゜3,...
..., is configured to be recorded on the n-th track.

9 is the switching part of each block of digital signal.
This is an input terminal to which a synchronizing signal in which an H level signal appears for the bit length is input. 1o is an n-bit shift register, in which the value at the input terminal 9 is shifted every clock in synchronization with the rising edge of the clock input from the input terminal 7, and the output terminals Q1*Q2+...
...+Qn appears. Also shift register 1o
The output terminals Q1+Q2+Qn of are connected to respective output control terminals of the power amplifiers 4, 5.6, respectively. Note 1. , I: The structure related to the non-recording track is the same as the above structure, so it is omitted in the drawing.

Regarding the conventional magnetic recording device configured as described above,
The operation will be explained below. FIG. 4 shows an operation explanatory diagram of a part of FIG. 3, and a e b
t' t a e ' s ' respectively indicate an example of the waveform of the same code point in FIG.

Also, t represents the time axis.1. ．． 12. ......,t
n is the pitch of digital signal waveform 0) D, , D
2°...-..., expressed by the interval of occurrence of Dn.

3 and 4, the rising edge of the clock (waveform a) input from the input terminal 7 is synchronized with the edge of the clock, and the synchronization signal (waveform b) input from the input terminal 9 is sequentially transmitted by the shift register 10. shifted, shift register 1o
The output terminals Q1t, Q2*..., Qn have 11.12. as shown in waveforms d, e, f', respectively. ...
. . . , an H level signal with a length of 1 bit is output in each interval tn. Therefore, the power amplifiers 4, 5.6 are each 1. , 12.1n sections.

Here 1. , 12.1n interval, the power amplifier group receives a digital signal (waveform C) of 1. D2. Since Dn are each input, t, respectively.

t2. tn section Vcb, and the recording heads 1, 2.3 respectively receive digital signals Dl, D2. A recording current corresponding to Dn will flow.

Similarly, input terminals 7, 8, 9, . Since the signal is repeatedly input for each block from ).

The above-mentioned operations are also repeated.

As a result, all magnetic head tails have a predetermined number of 1 for each block.
This is a so-called pulse train current recording in which the recording current is driven by the recording current corresponding to the bit. It is generally known that a magnetic recording device can be continuously magnetized if the pulse train current interval is appropriately selected.

Since the overall recording current is small, the burden on the power supply is reduced.

Furthermore, it is possible to integrate the components shown in FIG. 3 into a single recording head.

In theory, only a few external output terminals were required regardless of the number of tracks, which was advantageous in terms of manufacturing.

Turning the recording operation on and off is realized by turning on and off the power to each component shown in FIG.

Problems to be Solved by the Invention However, the prior art example described in ) is constructed on the premise that all tracks are recorded simultaneously, and it is not possible to record a specific track or a group of tracks independently. . For example, the tape position search track and still image recording track have such functions.

It is desirable to be able to record independently from the audio signal track group, but in order to achieve this, it is necessary to provide an independent recording circuit. in this case.

If all tracks are recorded simultaneously, there will be tracks where the recording current flows at the same time, making it necessary to increase the capacity of the stain source, increasing heat generation and power consumption, and losing the advantages of the pulse train current recording method. . Furthermore, it is necessary to provide separate external terminals for recording commands), leading to an increase in the number of head terminals.

The present invention solves the problems listed in item L without increasing the number of head terminals and power supply capacity.

An object of the present invention is to provide a digital magnetic recording device that can independently record a specific track or a group of tracks.

Means for Solving the Problems In order to achieve this object, the digital magnetic recording device of the present invention has a first terminal into which a digital signal to be distributed and recorded on a plurality of tracks is input, and a a second terminal to which a control signal is input, in which a group of recording command signals instructing recording to a specific track or a group of tracks is added before or after a track synchronization signal for making track correspondence; 1st
and a third terminal into which a clock for timing each signal inputted to the second terminal is inputted, and an extraction means for extracting the recording command signal group and the track synchronization signal from the control signal. , is configured to cause the digital signal to be recorded on each corresponding track or track group of the magnetic recording medium by the extracted recording command signal group.

The present invention has the following configuration, extracts a track synchronization signal and a group of recording command signals from an input control signal, performs pulse train current recording of all tracks using this track synchronization signal, and specifies a pulse train current using a group of recording command signals. tracks or track groups can be recorded independently, and there is no need to newly increase the stain source capacity by adding a new external connection terminal.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to one drawing. FIG. 1 shows a configuration diagram of a digital magnetic recording device according to an embodiment of the present invention. In FIG. 1, 11, 12, 13, 14 are the first, second, third, . . . , respectively of a group of n recording heads.
. . . is a recording head corresponding to the n-th track. In this embodiment, the first and second tracks are auxiliary tracks, and the third to nth tracks are, for example, a group of audio digital signal tracks.

Numerals 15, 18 and 17, 18 are power amplifiers that respectively drive recording heads 11, 12 and 13, 14 of a group of n power amplifiers. It should be noted that these power amplifier fleets have the same configuration as the conventional example. Also, 19, 20, 21
．． 22 is a two-person AND gate whose output is connected to each output control terminal of the power amplifiers 15, 16, 17, and 18 out of a group of n AND gates.

23 is an input terminal to which a clock is input; 24 is an input terminal to which a digital signal to be recorded is input in synchronization with the clock; the clock and digital signal have the same structure as in the conventional example. Further, 26 is an input terminal to which a control signal is input. Here, the control signal consists of a synchronization signal in which an H level signal appears for a length of 1 bit at the final bit position of each block of the digital signal, and a 3-bit recording command signal added after this synchronization signal. . Note that the above 3-bit recording command signal is in the order KRi! 01, RKC2, and RT1C3, and record commands for the first, second, and other track groups, respectively, are indicated by H level signals.

26 is a 6-bit shift register, and input terminal 23
The rise of the clock input from the input terminal 26 is synchronized with the edge, and the control signal input from the input terminal 26 is sequentially outputted to the output terminals Q, -Q6.

Further, 27 is an output terminal Q of the shift register 26.

is an H level signal and output terminal Q4. Q5. This is an AND gate that outputs an H level signal when Q6 is an L level signal.

28 is a 3-bit latch, and when the output of the AND gate 27 is an H level signal, the input terminal "11" of the latch 28 is
"2" The level applied to step 3 is latched in synchronization with the rising edge of the clock and output terminals Q, Q2.
Q, respectively. When the output of the AND gate 27 is an L level signal, the output of the latch 28 does not change regardless of the presence or absence of a clock. Also, the input terminal 14 of the latch 28. I2. I, respectively, are input terminals 25. The output terminal Q21 of the shift register 26 is connected to the output terminal Q21. Furthermore, the output terminals Q, Q of the latch 28
2. Q, are AND gates 19, 20, respectively. It is connected to each first input terminal of the other AND gate groups.

30 is an n-bit shift register, which sequentially transfers the output value of the AND gate 2a to the output terminals Q1*Q2*Q3 of the shift register 3o in synchronization with the rising edge of the clock.
m... Output to Qn. Note that the output terminal Q1 of the shift register 30. Q2. Q3. Qn are connected to the input terminals of the towns of 19, 20, 21, and 22, respectively.

31 is a shift register that delays the digital signal input from the input terminal 24 by 3 clocks and outputs it, and the output of the shift register 31 is sent to the power amplifiers 15, 16, 17.
．． It is connected to the input terminals of all power multiplication ships such as 18.

In this embodiment, only the configuration diagram for four tracks out of n tracks is shown, but since the other tracks have the same configuration, they are omitted from the drawings.

The operation of the embodiment of the present invention configured as described above will be described below. FIG. 2 shows an operation explanatory diagram of a part of FIG. 1, and the symbol g t h=...
. . , M, and X each indicate an example of the waveform of the same code point in FIG. t represents the time axis 11.
12. . . . , tn is the pitch of digital signal waveform 1)D1*”2+ . . .

represents the interval in which D occurs. It should be noted that in all of the waveforms in FIG. 2 except for waveform g, the rising edge of the clock (waveform g) changes slightly behind the rising edge.

Omitted in the drawing.

Now, when the control signal (waveform h) is input from the input terminal 26, the clock input from the input terminal 23 (
Shift register 2 is activated in synchronization with the rising edge of waveform g).
6 output terminal Q1. Q2. Q,・Q4. Q5.
Q6 has a waveform] + k t t, ” + p+ q
The waveforms shown in are sequentially output. After an interval t3, the output terminals Q5+Q4+Q5 .
Since Q6 becomes H, L, L, and L level signals, respectively, an H level signal (waveform r) appears as the output of the AND gate 27. This waveform r becomes a synchronization signal.

Next, since the output of the AND gate 27 is an H level signal in the t3 period, the input terminals X, I2, ., I2, .
The recording command signal RI11. RXC
2. The contents of RXO3 (waveforms k, j, h) are all latched, and after the start edge of the t4 interval, the contents of RXO3 (waveforms k, j, h) are latched.
output terminal Q1. Q2. It is output to Q. Here, each of the waveform recording command signals REC1 to RI13 is H.
If it is assumed that a level signal indicates recording and an L level signal indicates non-recording, each output of the latch 28 also indicates that an H level signal indicates recording and an L level signal indicates non-recording. Note that the control signal (waveform h) is input for each block, so the extraction of the synchronization signal (waveform r) and the recording command signals RI11 to
Latching of RXC3 is also performed for each block.

On the other hand, the synchronization signal (waveform r) output from the AND gate 27 is sent to the output terminal Q1+Q2+Q5 of the shift register 3o in synchronization with the rising edge of the clock (waveform g).
+......, Qn (waveform s I
u tma, W), which is repeated for each block.

Furthermore, the digital signal input from the input terminal 24 (
Waveform i) is delayed by 3 clocks by shift register 31 (waveform x) + power amplifier 15°16.17,1
8. , is input.

Therefore, for example, if the recording command signal R11:1 having the control signal waveform is an H level signal, the output terminal Q of the latch 2B is latched to an H level signal after the t4 interval, and the output terminal of the shift register 3o during the t4 interval. Since Q1 becomes an H level signal (waveform S), the output of the AND gate 19 also becomes an H level signal in the same section, and the power amplifier 16 drives the recording head 11 to output a digital signal to the first track of the magnetic recording medium. Of (waveform X), bit D is recorded. Waveform recording command signal R1-C1
When is an L level signal, the output terminal Q3 of the latch 28 is latched to an L level signal after the t4 interval, so the output of the AND gate 19 remains an L level signal, and the power amplifier 16 cannot drive the recording head. No recording will be made without this.

Similarly, the recording command signal R having the control signal waveform is
If EO2 is an H level signal, bit D2 of the digital signal (waveform X) is recorded in the second track via the power amplifier 16 and recording head 12 in the st5 interval.

Furthermore, the recording command signal RI1 having the control signal waveform is
3 is an H level signal, the H level signal is latched at the output terminal q of the latch 28, so the AND gate 19
, 20, the same waveform as the output terminals Q3 to Qn of the shift register 3o is output to each output of all the AND gate groups except 20. Therefore, in interval t6, bit D3 of the digital signal (waveform D5. . . . are sequentially recorded on corresponding tracks, and finally, in the tn+s interval, the bits of the digital signal are recorded on the n-th track via the power amplifier 18 and the recording head 14.

These recording operations are repeated for each block.

As described above, according to this embodiment, the synchronization signal and the recording command signal group can be extracted by a combination of shift registers and gates, so the circuit configuration is simple. Furthermore, by delaying the digital signal using the shift register 31, it is possible to start or stop recording from the first track.

Convenient for signal processing.

Note that in this embodiment, the auxiliary track group is the first. Although the second track is used, the track position and number of tracks can be set freely. In that case, the connection between the latch 28 and the AND gate group may be appropriately selected.

Furthermore, in this embodiment, there are three types of recording command signals;
The types of recording command signals can be increased or decreased depending on the purpose, such as increasing the number of audio signal channels or reciprocating recording methods. in this case,
The necessary number of bits of the recording command signal are added to the synchronization signal, and the shift register 26, AND gate 27 . latch 2
The number of input/output terminals (8) can be selected appropriately, and there is no need to increase the number of external connection terminals. However, even if the recording command signal group is added before the synchronization signal, it can be implemented with a simple configuration using the same concept as in this embodiment.

Effects of the Invention The present invention provides a first terminal to which a digital signal to be distributed and recorded on a plurality of tracks is input.

A second terminal to which a control signal is input, in which a group of recording command signals for respectively instructing recording to a specific track or a group of tracks is added before or after a track synchronization signal for making track correspondence of the digital signal. a third terminal to which a clock for timing each signal input to the first and second terminals is input; and an extraction circuit for extracting the recording command signal group and the track synchronization signal from the control signal. and recording the digital signal on each corresponding track or track group of the magnetic recording medium using the extracted recording command signal group, thereby recording a specific track or track without increasing the number of head terminals. Since tracks can be recorded independently and recording current does not flow to multiple tracks at the same time, there is no need to increase the capacity of the power supply. Furthermore, since the circuit configuration itself is sufficient, the circuit can be integrated into an integrated circuit and integrated with the recording head, making it possible to realize a digital magnetic recording device that can obtain a number of excellent effects.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a digital magnetic recording device according to an embodiment of the present invention, FIG. 2 is a timing chart explaining the operation in the configuration of FIG. 1, and FIG. 3 is a configuration diagram of a conventional digital magnetic recording device. FIG. 4 is a timing chart illustrating the operation of the configuration shown in FIG. 1.2, 3, 11.12, 13.14... recording head, 4, 5, 6, 15, 16, 17.18...
・・Power amplifier, 7.8, 9, 23, 24.25...
...Input terminal, 10, 26, 30.31...
Shift register, 19, 20, 21.22.27...
...and gate, 28 old... latch. Name of agent: Patent attorney Toshio Nakao and one other personff
, 12.ノ3.14 --- S in head. 16, lt, /7. fil-... / force multiplier 1
9.2σ, 2L22 ,, 7nd gate? 3.7
4.25 ・--person, V-renzi 11 Figure 2111 1 = Go Σ] Old [----- 1'''"°-7'''"゛ゝ''4 Figure 3 Figure 4

Claims (1)

[Claims] A first terminal into which a digital signal to be distributed and recorded on a plurality of tracks is input, and a first terminal for recording on a specific track or a group of tracks, respectively, before or after a synchronization signal for making track correspondence of the digital signal. a second terminal to which a control signal to which a group of recording command signals are added is input; and a third terminal to which a clock for timing each signal input to the first and second terminals is input. terminal, and extraction means for extracting the recording command signal group and track synchronization signal from the control signal, and extracting the recording command signal group and the track synchronization signal from the control signal, and extracting the recording command signal group and the track synchronization signal from the control signal. A digital magnetic recording device for recording the digital signal.