JPS58178684U - Insulated gate field effect transistor inspection equipment - Google Patents
Insulated gate field effect transistor inspection equipmentInfo
- Publication number
- JPS58178684U JPS58178684U JP7597982U JP7597982U JPS58178684U JP S58178684 U JPS58178684 U JP S58178684U JP 7597982 U JP7597982 U JP 7597982U JP 7597982 U JP7597982 U JP 7597982U JP S58178684 U JPS58178684 U JP S58178684U
- Authority
- JP
- Japan
- Prior art keywords
- insulated gate
- field effect
- effect transistor
- voltage source
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は、本考案の実施例のブロック図である。
なお図に5いて、1・・・・・・ドレイン電圧源、2・
・・ ゛・・・ゲートバイアス用電圧源、3・・・
・・・タイマー、4、 ・・・・・・コントロール回路
、5・・・・・・ゲートランプ電圧゛発生回路、6・・
・・・・シャント抵抗、7・・・・・・ドレイン、電流
(ID)検出回路、8・・・・・・コンパレータ、9・
・曲ドレイン電流(ID)設定値保持回路、10,11
゜12・・・・・・切換χ用ゲート回路、13・・曲カ
ットオ ゛フ電圧初期値保持回路、14・・・
・・・コンパレータ、15・・・・・・表示器、16・
・・・・・供試素子(MOSFET)、である。FIG. 1 is a block diagram of an embodiment of the present invention. In addition, in the figure 5, 1... drain voltage source, 2...
・・・ ゛... Gate bias voltage source, 3...
...Timer, 4, ...Control circuit, 5...Gate lamp voltage generation circuit, 6...
...Shunt resistor, 7...Drain, current (ID) detection circuit, 8...Comparator, 9.
・Curved drain current (ID) setting value holding circuit, 10, 11
゜12... Gate circuit for switching χ, 13... Song cutoff voltage initial value holding circuit, 14...
...Comparator, 15...Display device, 16.
...The device under test (MOSFET).
Claims (1)
性評価装置において、ドレイン電圧源、ドレイン電圧源
、ゲート電圧源、供試素子のカットオフ電圧を測定する
ためのランプ波形発生回路、ドレイン電流を検出する検
出回路そのドレイン電、流を初期ドレイン電流と比較す
るコンパレーター、バイアスの設定およびストレス印加
時間の設定、カットオフ電圧を測定するための設定を行
なうコントロール回路とタイ与−とを含んで構成される
ことを特徴とする絶縁ゲート型電界効果トランジスタ検
査装置。In a device for evaluating the stability of the insulator film quality of an insulated gate electric field transistor, a drain voltage source, a drain voltage source, a gate voltage source, a ramp waveform generating circuit for measuring the cutoff voltage of the device under test, and a drain current are detected. The detection circuit includes a drain current, a comparator that compares the current with an initial drain current, a control circuit that sets bias, stress application time, and settings for measuring cutoff voltage, and a tie. An insulated gate field effect transistor testing device characterized by:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7597982U JPS58178684U (en) | 1982-05-24 | 1982-05-24 | Insulated gate field effect transistor inspection equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7597982U JPS58178684U (en) | 1982-05-24 | 1982-05-24 | Insulated gate field effect transistor inspection equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS58178684U true JPS58178684U (en) | 1983-11-29 |
Family
ID=30085308
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7597982U Pending JPS58178684U (en) | 1982-05-24 | 1982-05-24 | Insulated gate field effect transistor inspection equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS58178684U (en) |
-
1982
- 1982-05-24 JP JP7597982U patent/JPS58178684U/en active Pending
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