JPS58169609A - クロツク同期制御方式 - Google Patents

クロツク同期制御方式

Info

Publication number
JPS58169609A
JPS58169609A JP5042482A JP5042482A JPS58169609A JP S58169609 A JPS58169609 A JP S58169609A JP 5042482 A JP5042482 A JP 5042482A JP 5042482 A JP5042482 A JP 5042482A JP S58169609 A JPS58169609 A JP S58169609A
Authority
JP
Japan
Prior art keywords
unit
timing signal
supplied
clock
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5042482A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6117031B2 (enExample
Inventor
Yoshifumi Ojiro
雄城　嘉史
Takao Kato
加藤　高夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5042482A priority Critical patent/JPS58169609A/ja
Publication of JPS58169609A publication Critical patent/JPS58169609A/ja
Publication of JPS6117031B2 publication Critical patent/JPS6117031B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/14—Time supervision arrangements, e.g. real time clock

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
JP5042482A 1982-03-29 1982-03-29 クロツク同期制御方式 Granted JPS58169609A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5042482A JPS58169609A (ja) 1982-03-29 1982-03-29 クロツク同期制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5042482A JPS58169609A (ja) 1982-03-29 1982-03-29 クロツク同期制御方式

Publications (2)

Publication Number Publication Date
JPS58169609A true JPS58169609A (ja) 1983-10-06
JPS6117031B2 JPS6117031B2 (enExample) 1986-05-06

Family

ID=12858479

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5042482A Granted JPS58169609A (ja) 1982-03-29 1982-03-29 クロツク同期制御方式

Country Status (1)

Country Link
JP (1) JPS58169609A (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63307087A (ja) * 1987-01-13 1988-12-14 Shigenobu Furukawa 多目的コンテナ

Also Published As

Publication number Publication date
JPS6117031B2 (enExample) 1986-05-06

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