JPS5815237A - Apparatus for manufacturing semiconductor - Google Patents

Apparatus for manufacturing semiconductor

Info

Publication number
JPS5815237A
JPS5815237A JP56114203A JP11420381A JPS5815237A JP S5815237 A JPS5815237 A JP S5815237A JP 56114203 A JP56114203 A JP 56114203A JP 11420381 A JP11420381 A JP 11420381A JP S5815237 A JPS5815237 A JP S5815237A
Authority
JP
Japan
Prior art keywords
wafer
flatness
stage
exposure
conjunction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56114203A
Other languages
Japanese (ja)
Inventor
Hiroshi Kawaguchi
浩 川口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP56114203A priority Critical patent/JPS5815237A/en
Publication of JPS5815237A publication Critical patent/JPS5815237A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment

Abstract

PURPOSE:To improve the yield of semiconductor devices by an apparatus wherein flatness of the wafter is adjusted prior to exposure. CONSTITUTION:A wafer 6 prior to exposure is transferred from a wafer carrier 1 in which it has been set to a wafer attracting stage 2. The stage 2 having the wafer attracted thereon is moved in conjunction with a flatness meter 3 so that flatness of the wafer is adjusted, and the stage 2 is positioned under an exposure apparatus 4. In this state, the wafer 6 undergoes exposure processing for a required time and then is housed in a carrier 5. The wafer stage 2 used in adjusting flatness is divided into parts 101-124. These parts are moved in conjunction with the flatness meter respectively and set such that flatness comes into the best state.

Description

【発明の詳細な説明】 本発明は半導体製造装置に関する。[Detailed description of the invention] The present invention relates to semiconductor manufacturing equipment.

従来の半導体用露光装置は、平たんな真空吸着用の吸着
口により半導体ウニノ・−を吸着する事に１シ、平たん
１を出している。A conventional exposure apparatus for semiconductors uses a flat suction port for vacuum suction to suction semiconductor particles.

半導体製造にお社る半導体ウニノ・−１ｊ１製造工程中
において熱処理、酸化、拡散等により１反り。Warpage due to heat treatment, oxidation, diffusion, etc. during the semiconductor manufacturing process.

―り等が生じる。このウニノー−の反り１曲＃）＃−ｊ
半導体用露光装置において半導体素子作匠用ノ（ターン
の転写に大きな障害となる。-ri etc. occur. 1 song of this unino - warp #) #-j
In semiconductor exposure equipment, it becomes a major hindrance to the transfer of turns for semiconductor device design.

本発明はかかる欠点を除去したもので、その目的ｉｊ、
半導体素子の歩留向上を目的とする。以下実施例に基づ
いて本発明の詳細な説明する。The present invention eliminates such drawbacks and has the following objectives:
The purpose is to improve the yield of semiconductor devices. The present invention will be described in detail below based on Examples.

第１図において、本発明にお社る露光装置概略図であり
、露光前のウェハー６をセットし霞つェハーキャリ了１
よりウェハーはウェハー吸着ステージ２に移り、ウニノ
・−を吸着をしたウェー・−ステージは、平たん１測定
器３下にあり、測定器と連動して平たん匿の調節が行な
われ霞徒、露ｆ！１ｉＷ４の下に入れ、必要時間、露光
処理をした徒ウェハーは、キャリア５に収納される。FIG. 1 is a schematic diagram of an exposure apparatus according to the present invention, in which a wafer 6 before exposure is set and a hazy wafer carry is completed.
The wafer then moves to the wafer adsorption stage 2, and the wafer stage that adsorbed the wafer is located under the flat 1 measuring device 3, and the flat holding is adjusted in conjunction with the measuring device. Dew f! The waste wafers placed under the wafer 1iW4 and subjected to exposure processing for the necessary time are stored in the carrier 5.

上記平たん度調節用、ウェハーステージは、ＩＩ２図に
示すＩＮＫ自１０１〜１２４に分割され自ｌＯ１〜至１
２４各分野部分が平たんｌＩ″測定器と連動で動１１．
平たん置が最良の状態となる様に設定される。The wafer stage for flatness adjustment is divided into INK 101 to 124 as shown in Figure II2.
24 Each field part moves in conjunction with the flat lI'' measuring instrument 11.
It is set so that it is placed flat for the best condition.

本発明は１配の様に、露光前のウェハーの平霞ん度を調
節する事ＫｚＬ半導体素子の歩留向上等すぐれｔ効果を
有するものであ）、ｌ！Ａ密ｌ素子製造にも有効である
。The present invention has excellent effects such as improving the yield of KZL semiconductor devices by adjusting the flat haze of the wafer before exposure, as shown in Section 1). It is also effective in manufacturing A-density L elements.

【図面の簡単な説明】[Brief explanation of the drawing]

ｗＬ１図は本発明による概観図、第２図はステージの詳
細図である。 以　　　上 出願人　株式会社諏訪精工舎 代理人　最　　上　　　　務Figure wL1 is an overview diagram according to the present invention, and Figure 2 is a detailed diagram of the stage. Applicant: Suwa Seikosha Co., Ltd. Agent Mogami

Claims (1)

【特許請求の範囲】[Claims] 半導体用ｇ光装置において、半導体ウニノ・−の平たん
ｉを、調節できる事を特徴とする半導体製造装置。A semiconductor manufacturing device characterized in that the flatness of the semiconductor unit can be adjusted in the g-optical device for semiconductors.
JP56114203A 1981-07-21 1981-07-21 Apparatus for manufacturing semiconductor Pending JPS5815237A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56114203A JPS5815237A (en) 1981-07-21 1981-07-21 Apparatus for manufacturing semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56114203A JPS5815237A (en) 1981-07-21 1981-07-21 Apparatus for manufacturing semiconductor

Publications (1)

Publication Number Publication Date
JPS5815237A true JPS5815237A (en) 1983-01-28

Family

ID=14631784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56114203A Pending JPS5815237A (en) 1981-07-21 1981-07-21 Apparatus for manufacturing semiconductor

Country Status (1)

Country Link
JP (1) JPS5815237A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4888871A (en) * 1972-02-02 1973-11-21
JPS54146580A (en) * 1978-05-09 1979-11-15 Nippon Telegr & Teleph Corp <Ntt> Thin plate flattening correction mechanism
JPS56130738A (en) * 1980-03-19 1981-10-13 Hitachi Ltd Method and device for exposure

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4888871A (en) * 1972-02-02 1973-11-21
JPS54146580A (en) * 1978-05-09 1979-11-15 Nippon Telegr & Teleph Corp <Ntt> Thin plate flattening correction mechanism
JPS56130738A (en) * 1980-03-19 1981-10-13 Hitachi Ltd Method and device for exposure

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