JPS58143498A - メモリ・アレイ - Google Patents

メモリ・アレイ

Info

Publication number
JPS58143498A
JPS58143498A JP58003622A JP362283A JPS58143498A JP S58143498 A JPS58143498 A JP S58143498A JP 58003622 A JP58003622 A JP 58003622A JP 362283 A JP362283 A JP 362283A JP S58143498 A JPS58143498 A JP S58143498A
Authority
JP
Japan
Prior art keywords
floating gate
transistor
cell
gate
fet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58003622A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6228518B2 (en, 2012
Inventor
チヤ−ルズ・リ−ブス・ホフマン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS58143498A publication Critical patent/JPS58143498A/ja
Publication of JPS6228518B2 publication Critical patent/JPS6228518B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP58003622A 1982-02-19 1983-01-14 メモリ・アレイ Granted JPS58143498A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/350,530 US4486859A (en) 1982-02-19 1982-02-19 Electrically alterable read-only storage cell and method of operating same
US350530 1994-12-07

Publications (2)

Publication Number Publication Date
JPS58143498A true JPS58143498A (ja) 1983-08-26
JPS6228518B2 JPS6228518B2 (en, 2012) 1987-06-20

Family

ID=23377116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58003622A Granted JPS58143498A (ja) 1982-02-19 1983-01-14 メモリ・アレイ

Country Status (4)

Country Link
US (1) US4486859A (en, 2012)
EP (1) EP0087012B1 (en, 2012)
JP (1) JPS58143498A (en, 2012)
DE (1) DE3380330D1 (en, 2012)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4656729A (en) * 1985-03-25 1987-04-14 International Business Machines Corp. Dual electron injection structure and process with self-limiting oxidation barrier
US4758988A (en) * 1985-12-12 1988-07-19 Motorola, Inc. Dual array EEPROM for high endurance capability
US5153684A (en) * 1988-10-19 1992-10-06 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with offset transistor
US5171469A (en) * 1989-08-22 1992-12-15 Merck Patent Gesellschaft Mit Beschraenkter Haftung Liquid-crystal matrix display
EP0757835A1 (en) * 1994-04-29 1997-02-12 Atmel Corporation High-speed, non-volatile electrically programmable and erasable cell and method
US5581502A (en) * 1995-05-02 1996-12-03 Advanced Micro Devices, Inc. Method for reading a non-volatile memory array
WO2002056316A1 (fr) * 2001-01-12 2002-07-18 Hitachi, Ltd. Memoire remanente a semi-conducteur
US6721204B1 (en) * 2003-06-17 2004-04-13 Macronix International Co., Ltd. Memory erase method and device with optimal data retention for nonvolatile memory
US7755941B2 (en) * 2007-02-23 2010-07-13 Panasonic Corporation Nonvolatile semiconductor memory device
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
DE102010049503B4 (de) * 2010-10-27 2012-05-31 Texas Instruments Deutschland Gmbh Elektronische Schaltung mit einem Transistor mit potentialfreiem Gate und Verfahren zum vorübergehenden Deaktivieren eines Transistors mit potentialfreiem Gate

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4051464A (en) * 1975-09-08 1977-09-27 Honeywell Inc. Semiconductor memory cell
JPS5457875A (en) * 1977-10-17 1979-05-10 Hitachi Ltd Semiconductor nonvolatile memory device
US4185319A (en) * 1978-10-04 1980-01-22 Rca Corp. Non-volatile memory device
US4314265A (en) * 1979-01-24 1982-02-02 Xicor, Inc. Dense nonvolatile electrically-alterable memory devices with four layer electrodes
IT1224062B (it) * 1979-09-28 1990-09-26 Ates Componenti Elettron Metodo di programmazione per una memoria a semiconduttore non volatile elettricamente alterabile
US4434478A (en) * 1981-11-27 1984-02-28 International Business Machines Corporation Programming floating gate devices

Also Published As

Publication number Publication date
US4486859A (en) 1984-12-04
EP0087012A2 (en) 1983-08-31
EP0087012B1 (en) 1989-08-02
EP0087012A3 (en) 1986-03-05
DE3380330D1 (en) 1989-09-07
JPS6228518B2 (en, 2012) 1987-06-20

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