JPS58129627A - 入出力制御装置 - Google Patents

入出力制御装置

Info

Publication number
JPS58129627A
JPS58129627A JP1348682A JP1348682A JPS58129627A JP S58129627 A JPS58129627 A JP S58129627A JP 1348682 A JP1348682 A JP 1348682A JP 1348682 A JP1348682 A JP 1348682A JP S58129627 A JPS58129627 A JP S58129627A
Authority
JP
Japan
Prior art keywords
input
output
channel
queue
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1348682A
Other languages
English (en)
Japanese (ja)
Other versions
JPS62541B2 (enrdf_load_stackoverflow
Inventor
Yoshihisa Shibata
柴田　義久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1348682A priority Critical patent/JPS58129627A/ja
Publication of JPS58129627A publication Critical patent/JPS58129627A/ja
Publication of JPS62541B2 publication Critical patent/JPS62541B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
JP1348682A 1982-01-29 1982-01-29 入出力制御装置 Granted JPS58129627A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1348682A JPS58129627A (ja) 1982-01-29 1982-01-29 入出力制御装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1348682A JPS58129627A (ja) 1982-01-29 1982-01-29 入出力制御装置

Publications (2)

Publication Number Publication Date
JPS58129627A true JPS58129627A (ja) 1983-08-02
JPS62541B2 JPS62541B2 (enrdf_load_stackoverflow) 1987-01-08

Family

ID=11834441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1348682A Granted JPS58129627A (ja) 1982-01-29 1982-01-29 入出力制御装置

Country Status (1)

Country Link
JP (1) JPS58129627A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02144509U (enrdf_load_stackoverflow) * 1989-05-08 1990-12-07

Also Published As

Publication number Publication date
JPS62541B2 (enrdf_load_stackoverflow) 1987-01-08

Similar Documents

Publication Publication Date Title
US4901232A (en) I/O controller for controlling the sequencing of execution of I/O commands and for permitting modification of I/O controller operation by a host processor
US5613163A (en) Method and system for predefined suspension and resumption control over I/O programs
US3079082A (en) Electronic computer with interrupt feature
JP5159902B2 (ja) 入出力処理システム内のチャネル・サブシステムと通信するように構成された制御装置において可変長のデバイス・コマンド・ワード（ｄｃｗ）を処理するための方法
JPH04318649A (ja) データ処理システム
JPH0670783B2 (ja) データ処理システムのコマンド・インタフエース
JPS5826581B2 (ja) 通信処理装置を含むデ−タ処理装置
CN105528195B (zh) 一种支持同时多线程指令乱序发射的飞行记分牌处理方法
US3961312A (en) Cycle interleaving during burst mode operation
US3500328A (en) Data system microprogramming control
JPS58129627A (ja) 入出力制御装置
EP0037264A2 (en) Associative memory system
JPS58129629A (ja) 入出力制御装置
JPS60129864A (ja) 構成制御情報生成方式
CN118155813A (zh) 一种术后复苏床位的分配方法、装置及电子设备
JPH0567040A (ja) 周辺装置制御回路
JPS61122756A (ja) 汎用キユ−制御方式
JP2763313B2 (ja) 電子計算機システムの構成制御方法
JPH0231238A (ja) コンピュータのタスク優先度制御方式
JPH02178773A (ja) データ処理装置
JPH06250965A (ja) 入出力制御装置
JPS63241641A (ja) 仮想計算機システムにおける入出力制御方式
JPH04171563A (ja) 周辺装置制御部
JPS5820060B2 (ja) 入出力制御装置
JPS6355620A (ja) 入出力制御装置