JPS5812346A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To materialize a plural kinds of logic levels by a kind of integrated circuit by a method wherein plural kinds of circuits having different circuit forms or logic levels are previously established and a desired circuit out of the said plural kinds of circuits or a plurality of circuits are selectively used. CONSTITUTION:In the drawing, P is an internal logic circuit and is entirely composed of current switching type logic circuits. g1-gm show output circuit sections and each output bit includes a CML circuit feeding out collector output as a direct output terminal, an ECL circuit feeding out collector output through an emitter follower and a TTL circuit, and a desired circuit type out of these three kinds of circuit types can be selected by selective means. When the selective means of g1-g4 in the drawing are connected, the output Z1 becomes the output of CML level and when the selective means of h1-h4 are connected, the output Z1 becomes the output of ECL level. When the selective means of i1- i8 are connected, the Z1 output becomes TTL output.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit configuration of a semiconductor integrated logic circuit. TTL is a circuit format that constitutes an integrated circuit.

Although many types of circuit formats such as CML, WCL, and C-MO8 are known, each having a different logic level, an integrated circuit is generally constructed of one of the above circuit formats. However, the performance required for integrated circuits installed in convenience stores etc. varies depending on the part in which they are used, and it is extremely rare for a single type of logic circuit to be unified, especially in large high-performance converters. .

For example, for a CPU section that requires high-speed operation, CML or E
It is common practice in system design to use relatively low-speed operating integrated circuits such as the MO8 series for peripheral control of high-speed integrated circuits such as CL. In this case, since signals with different logic levels are transmitted and received within the same system, it is inevitable that a level conversion circuit must be used, but the presence of this level conversion circuit in the system does not necessarily have only advantages. It is not provided.

For example, the space required for the level conversion circuit itself reduces packaging density and increases power consumption.

Furthermore, since the power supply line signal line length also increases, the wiring density increases. Furthermore, from the standpoint of signal transmission speed, the delay time increases by the amount that the signal passes through this level conversion circuit, which is also a drawback.

The present invention provides a new semiconductor integrated logic circuit in which a non-conventional circuit configuration is applied to the input/output section in order to solve the problems of the level conversion circuit as described above. In the hand conductor integrated logic circuit of the present invention, a plurality of types of circuits having different circuit types or logic levels are installed in each input section and each output section in advance, and a desired one or more of the plurality of types of circuits are installed. This allows the cylinder circuit to be used selectively.

That is, according to the means of the present invention, even if the logic level of the input signal and the logic level of the output signal are different, there is no problem at all and no external means for level conversion is required.
In general, there are extremely many integrated circuits whose functions are exactly the same even if their logic levels ti are different, and this tendency is especially true for integrated circuits used for basic calculations. Therefore, although these integrated circuits have the same function, their circuit formats and manufacturing processes are different, so they must be designed and manufactured as different types of integrated circuits ranging from the bipolar series to the MO8 series. This is natural from the perspective of conventional integrated circuits, but the present invention is an attempt to change the way of thinking in order to realize multiple types of logic levels using one type of integrated circuit.

Logic level and circuit type selection means in the present invention,
The selection process is not uniform, and it is possible to select a selection means or position a selection method as necessary. For this reason, the selection method differs slightly depending on the positioning of the logic level selection process, but no matter which selection method is used, it will not work until the process before the final desired input/output logic level is selected. It can be manufactured as one type of integrated circuit. Therefore, it is possible for all integrated circuit companies whose internal logic is common to implement the measures of the present invention, and the so-called product-specific design is performed only in the final logic level selection process. Since duplication of circuit design can be avoided, TAT (turnover time) can be shortened and production efficiency (mass productivity) can be significantly improved.

A specific method for selecting the logic level mentioned above is the mask programmable i is field progera! Pull and %/-
Although different formats may come to mind, these deviations do not pose a particular problem in terms of construction and can be easily realized using conventional techniques.

The present invention further provides a method for configuring a conventional integrated circuit, such as P.
It goes without saying that it is possible to use a relatively new method such as LA (programmable logic array) and gate array, which was born out of the market demand for high-mix low-volume products.

As is well known, the realization of a wide variety of products using PLA and gate arrays is limited only to logic functions, and is not a method that allows changes to the input/output logic level or circuit format.

Therefore, if the present invention is used in combination with these conventional methods, a wide variety of integrated circuits with different logic functions and logic levels can be realized by a single type of logic design, and the present invention is superior to conventional integrated circuits. It is clear that it provides extremely high i versatility.

The present invention will be further explained below with reference to the drawings.

Figure 1 shows the configuration of an integrated circuit based on the conventional concept, in which each input/output section has only a few logic levels. There are integrated circuits with different levels, but they do not make it possible to select the logic level, and there is no difference from conventional integrated circuits.In Figure 1, a indicates an internal logic circuit, and b indicates each Input and output circuits are shown.

FIG. 2 shows the basic concept of the circuit of the present invention, where d corresponds to an internal logic circuit section, and e and f correspond to input and output circuit sections, respectively. In the 8th part and the f part, each input line and output line each have a plurality of selected circuits, and each input/output line has a plurality of selected circuits.
The desired circuits are selection means A~Amm, B~B11.
11, Cth~cek, Dt 0 selected by 1~Dek All circuits that are not selected are logically disconnected.

The selection means allows selection according to the input signal to each input/output and the logic level of the output sending end device, but it goes without saying that each input/output may have a different logic level. No matter which circuit is selected, it does not depart from the spirit of the invention.

Although the specific method of the selection means is not described in FIG. 2, the present invention does not specify the specific method of the selection means. Therefore, any selection method, such as changing the selected point using a mask, which is usually employed as a programming means for selection, or field programming means using PN junction destruction or phase cutting techniques, can be used in the implementation of the present invention. It goes without saying that scales are applied as a method.

FIG. 3 partially shows an embodiment of the present invention.

P is an internal logic circuit, which is entirely composed of current switching logic circuits. gt to gpeng indicate the output circuit section, and each output pit includes a CML circuit where the Hiro collector output can be taken directly as an output terminal, a gCL circuit and a TTL circuit where the collector output is output via an emitter follower. 9. A desired circuit type is selected from these three circuit types by the selection means.

When the selection means gt to g4 in the figure are connected, the output Z1
is a CML level output, and when the selection means ht to h4 are connected, the output z1 is an ECL level output. Further, when the selection means 11 to i8 are connected, the zl output becomes a TTL level output.

In Fig. 3, only the internal logic circuit section and output circuit section are shown for simplicity, but if multiple circuit types are installed in the input circuit, the gt output It goes without saying that a desired circuit type can be selected and used using the same means as the circuit.

As described above, the gist of the present invention is simple, and it can be achieved using conventional technology without using any special integrated circuit technology, so it is extremely easy to realize it. We believe that it is sufficiently effective.

[Brief explanation of the drawing]

FIG. 1 is a conventional integrated circuit diagram, and FIG. 2 is a basic configuration diagram of the integrated circuit of the present invention. FIG. 3 is a diagram showing an embodiment of the present invention. P...Internal logic circuit, gt to gm input t
Hecha 31 yen 1

Claims (1)

[Claims] Multiple types of circuits with different circuit types or logic levels are installed in each input section and each output section in advance, and a desired one or multiple circuits from among the multiple types of circuits can be selectively used. A semiconductor integrated circuit characterized by: