JPS5812320A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5812320A
JPS5812320A JP56110467A JP11046781A JPS5812320A JP S5812320 A JPS5812320 A JP S5812320A JP 56110467 A JP56110467 A JP 56110467A JP 11046781 A JP11046781 A JP 11046781A JP S5812320 A JPS5812320 A JP S5812320A
Authority
JP
Japan
Prior art keywords
film
silicon
semiconductor region
substrate
polycrystalline
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56110467A
Other languages
Japanese (ja)
Inventor
Junji Sakurai
桜井 潤治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56110467A priority Critical patent/JPS5812320A/en
Publication of JPS5812320A publication Critical patent/JPS5812320A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD

Abstract

PURPOSE:To improve the shape and the adhesion force to an insulating film of a single crystal semiconductor region, by coating the upper surface of a non-single crystal semiconductor region with an Si nitride film and irradiating by a flux of light in the manufacture of a semiconductor device of an SOI structure. CONSTITUTION:An Si dioxide film approx. 600nm thick 12 as an insulating film, an Si polycrystalline film 14 approx. 500nm thick to form the semiconductor region and an Si nitride film 15 approx. 180nm thick as coating film are successively formed on a substrate 11. The Si dioxide film 12 served as the insulating film can be formed by thermal oxidation method, when the substrate 11 is constituted of an Si. When the substrate 11 is constituted of a substance beside an Si, or even of an Si, the film can be formed of a mono silane (SiH4) by chemical evaporation method. The polycrystalline Si film 14 is formed by normal vapor growing method. Next, the coating film 15 and the polycrystalline Si film 14 are successively selective-removed by lithography method resulting in the formation of the semiconductor region isolated into an island shape.

Description

【発明の詳細な説明】 本発明は半導体装置の製造方法、特に絶縁基板上の分離
された非単結晶半導体領域を光束照射により単結晶化す
る方法に関す。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of monocrystalizing a separated non-single crystal semiconductor region on an insulating substrate by irradiation with a light beam.

基板上に形成された絶縁膜上に島状に分離された牛導体
嵩子【形成する80I (81ticon  onIn
timating Submtr*te1構造の半導体
装置の製造工程にシいて、絶縁膜上の非単結晶シリコン
すなわち多結晶シリコン或いは非結晶シリコンにより形
成され、その周囲が選択的に除去されることKよ!ll
I&秋に分離された薄膜状半導体領域を、レーザ光等の
光束照射により融解し、再結晶せしめて単結晶半導体領
域を形成する場合に、融解状態において形状が変化し、
単結晶化区の牛導体領埴に上表面の凹凸その他の変形を
生じ、更Kt縁膜が二酸化シリコンにより形成されてい
るならば、融解状態のシリコンと二酸化シリコン面との
瀝れの悪さから単結晶半導体領域の゛ぽ1部等において
絶縁膜からの剥離を生ずることがある。
80I conductor pads separated into islands on an insulating film formed on a substrate.
In the manufacturing process of semiconductor devices with timing Submtr*te1 structure, non-single crystal silicon, that is, polycrystalline silicon or amorphous silicon, is formed on an insulating film, and the surrounding area is selectively removed! ll
When a thin film semiconductor region separated by I&F is melted by irradiation with a beam of light such as a laser beam and recrystallized to form a single crystal semiconductor region, the shape changes in the melted state,
If unevenness or other deformation occurs on the upper surface of the conductor area in the single crystallized area, and if the Kt edge film is formed of silicon dioxide, this may be due to poor mating between the molten silicon and the silicon dioxide surface. Peeling from the insulating film may occur in a portion of the single crystal semiconductor region.

すなわち、第1図(a)の模式rgJK示す如く、非単
結晶シリフン領域の上面がwl覆されない開放された状
態で二酸化シリコン膜1上で光束照射により融解し再結
晶したシリコン2は液滴状の形状會呈する傾向を有し、
第1図(b)の断面因に例示する如く、二酸化シリコン
膜1上の再結晶シリコン領竣3において、図中Aで示す
基板からの剥離、Bで示す凹凸等を生じ易い。
That is, as shown in the schematic rgJK of FIG. 1(a), the silicon 2 melted and recrystallized by light beam irradiation on the silicon dioxide film 1 with the upper surface of the non-monocrystalline silicon region in an open state without being covered is in the form of a droplet. It has a tendency to take on the shape of
As illustrated in the cross-sectional view of FIG. 1(b), in the recrystallized silicon region 3 on the silicon dioxide film 1, peeling from the substrate as indicated by A in the figure and unevenness as indicated by B are likely to occur.

本発明は、非単結晶シリコンgA緘に光束照射を行って
形成される単結晶シリコン領域の形状及び絶壷膜との付
清力を、苧導体素子の形成に対して充分ならしめる製造
方法を得ることを目的とする。
The present invention provides a manufacturing method in which the shape of a single crystal silicon region formed by irradiating a non-single crystal silicon layer with a light beam and the cleaning force with respect to an insulating film are sufficient for the formation of a conductor element. The purpose is to obtain.

本発明の目的とする効果に、非単結晶シリコン領域の上
面上窒化シリコン膜によって被租して光束照射を行なう
ことにより得られるが、巣に絶縁膜の非単結晶シリコン
−域に接する層を窒化シリコンにより形成すること、或
いは非単結晶シリコン領域の上ifiを被覆番零前記輩
化シリコン展上に二酸化シリコン軸會重ねて被覆層を強
化することの一万もしくは双方を付加することによりそ
の効果が更に顕著となる。
The desired effect of the present invention can be obtained by irradiating the upper surface of the non-monocrystalline silicon region with a silicon nitride film. Formed with silicon nitride, or by adding a layer of silicon dioxide or both to strengthen the coating layer by overlaying the silicon dioxide layer on the advanced silicon layer of the non-monocrystalline silicon region. The effect becomes even more pronounced.

以下に本発明を実施例によりwmを用いて詳細に説明す
る。
The present invention will be explained in detail below using examples and wm.

票−の実施例は第2@−)に断面図を示す如く、基板1
1上に絶縁膜として厚き約600nmの二酸化シリコン
11112、早導体@緘を形成する厚さ約500nmの
多結晶シリコン編14、被覆膜として厚さ約180am
の窒化シリコン膜15t−馴次形成し、第二の実施例F
X第2図(b) K lllr面図を示す如く、基板l
l上に絶縁膜として犀名約600nim()二酸化シリ
コン膜12及び厚さ約100 amの窒化シリコンl[
13、半導体領域を形成する厚さ約50011!IIの
多結晶シリコン膜14、被覆層とじて厚さ約180nm
O窒化シリコン1115!順次形成し、第三の実施例社
第2図(e)K断面図を台 示す如く、基板11上に絶縁膜として厚さ約l晶mの二
酸化シリコンj[12、早導体領Iaを形成する厚さ約
IS OOnmの多結晶シリコンl[14、被覆層とし
て厚さ約60nmO窒化シリコン@15及び厚さ約ao
onmの二酸化シリコン膜16を順次形成し、第四の実
施例は第2i11(d)K断面Illを示す如く、基板
11上に絶縁膜とじて厚さ約500amの二酸化シリコ
yl11!及び厚さ約100 mWの窒化シリ;ン[l
11g、半導体領域を形成する厚さ約5iGOnmO多
結晶シリコン膜14、被覆膜として厚さ約620nmの
窒化シリコン[1115及び厚さ約5805mの二朦化
シリコン31161−Il1次形成した・ 前記各実施例において、絶縁属とする二酸化シリコン膜
1211基板11がシリコンよpなるときは熱酸化法に
より形成可能であり、基板11がシリコン以外の物質よ
りなるとき、或いはシリコンであり′C%、化学蒸着法
によpモノシラン(811ム)より形成する仁とが可能
である。
The embodiment of the board 1 is shown in the cross-sectional view in the 2nd @-).
Silicon dioxide 11112 with a thickness of about 600 nm as an insulating film on 1, a polycrystalline silicon layer 14 with a thickness of about 500 nm forming a fast conductor @ 14, and a film with a thickness of about 180 am as a covering film.
A silicon nitride film 15t of the second embodiment F is formed.
X Figure 2 (b) As shown in the K lllr side view, the substrate l
A silicon dioxide film 12 with a thickness of about 600 nm and a silicon nitride film 12 with a thickness of about 100 am are formed on the film as an insulating film.
13. The thickness to form the semiconductor region is about 50011! The polycrystalline silicon film 14 of II has a thickness of about 180 nm as a covering layer.
O silicon nitride 1115! As shown in the cross-sectional view of FIG. 2(e) K of the third embodiment, a silicon dioxide layer 12 with a thickness of about l crystal m and a fast conductor region Ia are formed on the substrate 11 as an insulating film. Polycrystalline silicon l[14] with a thickness of about IS OOnm, silicon nitride with a thickness of about 60 nm as a covering layer and silicon nitride with a thickness of about ao as a covering layer.
Onm silicon dioxide film 16 is sequentially formed, and in the fourth embodiment, as shown in the 2I11(d) K cross section Ill, a silicon dioxide film 16 with a thickness of about 500 am is formed on the substrate 11 as an insulating film. and silicon nitride [l] with a thickness of about 100 mW.
11g, approximately 5i GOnmO polycrystalline silicon film 14 with a thickness of about 5iGOnmO forming a semiconductor region, silicon nitride [1115 with a thickness of about 620nm as a coating film] and silicon dioxide 31161-Il with a thickness of about 5805m were primarily formed. Each of the above implementations In the example, when the insulating silicon dioxide film 1211 substrate 11 is made of silicon, it can be formed by a thermal oxidation method, and when the substrate 11 is made of a material other than silicon, or it is silicon, it can be formed by chemical vapor deposition. It is possible to form a compound from p-monosilane (811) by a method.

第二の絶縁膜として窒化シリコン膜181形成する場合
及び被覆膜とする窒化シリコン1!11の形成は、前記
モノシランとアン毫ニア(NH,1とによす化学蒸着法
により形成する。
When forming the silicon nitride film 181 as the second insulating film and forming the silicon nitride film 1!11 as the covering film, the silicon nitride film 181 is formed by the chemical vapor deposition method using the monosilane and anhydrous nitride (NH,1).

多結晶シリコン膜1”−常の気相成長法により形成すゐ
Polycrystalline silicon film 1'' - formed by conventional vapor phase growth method.

第二の被覆膜として二酸化シリコン1116に形成する
場合FXIIJ記絶縁膜の化学蒸着法によゐ場合と同様
に形成する。
When forming the second coating film on silicon dioxide 1116, it is formed in the same manner as in the case of using the chemical vapor deposition method for the insulating film described in FXIIJ.

次いで被覆膜16及び15並びに多結晶シリコンjii
14tl[次選択的に除去して島状に分離された半導体
領域を形成する。このlIK最上層はリソグラフ4法に
よp%第二層以下はその上層のバター/をマスクとして
エツチングを行なう、第2WIJ(a)乃至(−は牛導
体領域形成後管示す断面図である。
Next, coating films 16 and 15 and polycrystalline silicon jii
14tl [Then, semiconductor regions separated into islands are formed by selectively removing. This IIK uppermost layer is etched by the lithography 4 method using the upper layer of butter as a mask for etching the p% second layer and below.

CO状態の基板に例え[10W連続波アルゴン(Ar 
ル−ザ光をビーム直@50nm、so1オーバーラツプ
として10Cm/S@a の速駅で走査照射することに
より、多結晶シリコンを単結晶シリコンとした。この光
束照射による単結晶化において、各実施例について、窒
化シリコンによる被覆膜11Sにより第1WJ偽)或い
は伽)に例示した如き半導体領域の上表面の凹凸或いは
剥離等によゐ障害が排除された。
For example, for a substrate in CO state [10W continuous wave argon (Ar
The polycrystalline silicon was made into single crystal silicon by scanning and irradiating laser light with a beam direct @50 nm and a so1 overlap at a speed of 10 Cm/S@a. In the single crystallization by this light beam irradiation, in each example, the coating film 11S made of silicon nitride eliminates obstacles such as unevenness or peeling on the upper surface of the semiconductor region as exemplified in the 1st WJ. Ta.

12Kl’縁膜の第二層として窒化クリコン膜13を有
する第二及び第rso*施例は、第一の実施例に比較し
てフィールド領域での基板シリコンへの光の透過が弱め
られ光束照射の強度等に関する許容範囲が拡大され、被
覆膜の第二層として二酸化シリコン膜16を有する第三
及び第四の実施例についても反射防止効果によp、シリ
コン領域への光照射効率が向上するので同@に許容範H
が拡大された― 前記各実施例において、被覆膜15を窒化シリコンによ
り形成した理由は、脅化クリコンが二酸化シリコ3/に
比較して融層シリ=ryollれ性が員いこと及び高温
におけゐ安定性が勝ることにより、絶縁層の第二層とし
て窒化シリコン膜13Vt導入するのも融解シリコンの
濡れ性を向上することが第一の目的である。
12Kl' The second and second rso* embodiments having the nitride nitride film 13 as the second layer of the edge film have weaker light transmission to the substrate silicon in the field region than the first embodiment, so that the light flux irradiation is reduced. The permissible range regarding the strength etc. of the coating film is expanded, and the efficiency of light irradiation to the silicon region is improved due to the anti-reflection effect even in the third and fourth embodiments having the silicon dioxide film 16 as the second layer of the coating film. Therefore, the permissible range H for the same @
- In each of the above embodiments, the coating film 15 was formed of silicon nitride because the threatened silicone has a higher resistance to melting than silicon dioxide and because it is less susceptible to high temperatures. The primary purpose of introducing a silicon nitride film of 13Vt as the second layer of the insulating layer is to improve the wettability of molten silicon because of its superior stability.

又、被amの第二層として二酸化シリコン膜16を導入
することは、窒化シリコンでは一般に200nmllf
以上の厚さのJill[k安定に成長(しめゐことが困
難であるために1被侵膜の熱変形等に対すゐ余猶向上の
ための補強を二酸化シリーン膜16に依ったものである
。この場合に、第四の実施例の艶縁膜第二層の窒化シリ
コン膜]3は二酸化シリコン膜12を単結晶化後の二酸
化シリコン膜16の除去の際に保映する効果を有する。
Also, introducing the silicon dioxide film 16 as the second layer to be amended is generally 200nmllf for silicon nitride.
Since it is difficult to stably grow (tighten) a film with a thickness above 1, the silicon dioxide film 16 is used to strengthen the film to provide more resistance against thermal deformation, etc. In this case, the silicon nitride film 3 as the second layer of the glossy edge film of the fourth embodiment has the effect of retaining the silicon dioxide film 12 when the silicon dioxide film 16 is removed after single crystallization.

なお、第三の実施例においてに、単結晶化後の二酸化シ
リコン膜16の除去と同時に絶縁膜の二酸化シリコン膜
12%エツチングされるために膜12kl[16より充
分に厚く形成する。
In the third embodiment, since the silicon dioxide film 12 of the insulating film is etched by 12% at the same time as the silicon dioxide film 16 is removed after single crystallization, the film 12kl is formed to be sufficiently thicker than the film 16.

更に窒化シリコン膜15及び二酸化シリコン膜1451
2元束照射の際に、多結晶シリコン膜14上に形成され
た誘電体薄膜として各境界面における反射光の干渉【支
配する。従りてCれらの膜15及び16の厚さは反射光
音出来る限り少くする光学的条件をも考慮して決定され
る。
Furthermore, a silicon nitride film 15 and a silicon dioxide film 1451
During the binary beam irradiation, the dielectric thin film formed on the polycrystalline silicon film 14 controls the interference of reflected light at each boundary surface. Therefore, the thicknesses of these films 15 and 16 are determined taking into account optical conditions for minimizing reflected light and sound.

以上に説明した実施例の如く非単結晶シリコンii埴の
上面管窒化シリコン膜によって被覆し1元束照射を行な
うことにより、形状及び絶縁膜との付着力が充分な単結
晶牛導体領績が形成され、この単結晶領域に安定した半
導体素子を形成することが出来る。
As in the embodiment described above, by covering the top surface of non-monocrystalline silicon II clay with a silicon nitride film and performing one-component beam irradiation, a single-crystal conductor with sufficient shape and adhesion with the insulating film can be obtained. A stable semiconductor element can be formed in this single crystal region.

本発明は以上酸明した如く、給縁換上に配詮さねπ非単
結晶半導体領域を光束照射により単結晶化し、この単結
晶半導体領域に半導体素子を形成するSOI構造の半導
体装置の製造方法において非単結晶半導体領域の上面を
窒化シリコン膜によって被覆して光束照射全行なうこと
により形成される単結晶半導体値琥の形状及び?縁膜と
の付着力を充分ならしめるものであって、5OI411
fi12)半導体装置の発展に大きく寄与する。
As explained above, the present invention manufactures a semiconductor device with an SOI structure in which a non-single crystal semiconductor region of π, which is disposed on a supply plane, is made into a single crystal by irradiation with a light beam, and a semiconductor element is formed in this single crystal semiconductor region. In the method, the top surface of a non-single-crystal semiconductor region is covered with a silicon nitride film and the entire surface of the non-single-crystal semiconductor region is irradiated with a light beam, thereby forming a single-crystal semiconductor layer. 5OI411 which ensures sufficient adhesion with the marginal membrane.
fi12) Contributes greatly to the development of semiconductor devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図−)及び缶)は従来の技術による単結晶化後の断
面図、第2図(a)乃至(d)は本発明の実施例を示す
断面■である。 図において、lは二酸化シリコン膜、2はシリコン、3
は単結晶シリコン領域、Ill’!基板、12は二酸化
シリsyj[1,13は窒化シリコン膜、14は非単結
晶シリコン、15は窒化シリコン膜、16α二酸化シリ
コンMI會示す。 茅l扉(幻    第7図(0 (17)(レノ ハ (C〕 (d)
Figures 1-) and 2) are cross-sectional views after single crystallization according to the prior art, and Figures 2 (a) to (d) are cross-sectional views showing an embodiment of the present invention. In the figure, l is a silicon dioxide film, 2 is silicon, and 3
is a single crystal silicon region, Ill'! 12 is a silicon dioxide syj [1, 13 is a silicon nitride film, 14 is a non-monocrystalline silicon, 15 is a silicon nitride film, and 16α silicon dioxide MI. Thatched door (illusion) Figure 7 (0 (17) (Renoha (C)) (d)

Claims (1)

【特許請求の範囲】[Claims] 絶縁層上に非単結晶半導体領域を配役し、光束照射によ
り前記非単結Ihl#P4体領破を単結晶半導体領域と
なし、前記単結晶子導体i!槍に¥導体素子を形成する
半導体装置の製造方@においで、前記非単結晶半導体g
A槍の上面會窒化シリコン膜により被覆して前記光束照
射を行なうことt−特徴とする半導体装置の製造方法。
A non-single-crystal semiconductor region is placed on the insulating layer, and the non-single-crystal Ihl#P4 body breakage is made into a single-crystal semiconductor region by light beam irradiation, and the single-crystalline conductor i! In the method for manufacturing a semiconductor device in which a conductor element is formed on a spear, the non-single crystal semiconductor g
A method for manufacturing a semiconductor device, characterized in that the upper surface of the spear is covered with a silicon nitride film and the luminous flux is irradiated.
JP56110467A 1981-07-15 1981-07-15 Manufacture of semiconductor device Pending JPS5812320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56110467A JPS5812320A (en) 1981-07-15 1981-07-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56110467A JPS5812320A (en) 1981-07-15 1981-07-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5812320A true JPS5812320A (en) 1983-01-24

Family

ID=14536441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56110467A Pending JPS5812320A (en) 1981-07-15 1981-07-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5812320A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61185917A (en) * 1985-02-14 1986-08-19 Asahi Glass Co Ltd Manufacture of semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50144376A (en) * 1974-05-09 1975-11-20
JPS5247673A (en) * 1975-10-15 1977-04-15 Hitachi Ltd Process for production of silicon crystal film
JPS5659694A (en) * 1979-10-18 1981-05-23 Agency Of Ind Science & Technol Manufacture of thin film

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50144376A (en) * 1974-05-09 1975-11-20
JPS5247673A (en) * 1975-10-15 1977-04-15 Hitachi Ltd Process for production of silicon crystal film
JPS5659694A (en) * 1979-10-18 1981-05-23 Agency Of Ind Science & Technol Manufacture of thin film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61185917A (en) * 1985-02-14 1986-08-19 Asahi Glass Co Ltd Manufacture of semiconductor device

Similar Documents

Publication Publication Date Title
JPS5812320A (en) Manufacture of semiconductor device
JPS6119116A (en) Manufacture of semiconductor device
JPS60143624A (en) Manufacture of semiconductor device
JPH0475649B2 (en)
JPS5983993A (en) Growth of semiconductor layer of single crystal
JPS5814529A (en) Manufacture of semiconductor device
JPS61185917A (en) Manufacture of semiconductor device
JPH0236052B2 (en)
JPH0335821B2 (en)
JPH02177534A (en) Manufacture of semiconductor device
JPS61212012A (en) Method for forming soi structure
JP2993107B2 (en) Semiconductor thin film manufacturing method
JP2532252B2 (en) Method for manufacturing SOI substrate
JPS6351370B2 (en)
JPS6151820A (en) Manufacture of semiconductor device
JPH02105517A (en) Manufacture of semiconductor device
JPS6091622A (en) Manufacture of semiconductor substrate
JPS6319808A (en) Manufacture of semiconductor single crystal layer
JPH0334847B2 (en)
JPH0722120B2 (en) Method for manufacturing semiconductor device
JPS60210833A (en) Manufacture of semiconductor device
JPS5886716A (en) Forming of single crystal semiconductor film
JPH03265157A (en) Manufacture of semiconductor substrate
JPS6151821A (en) Manufacture of semiconductor device
JPS58162031A (en) Heat processing method of polycrystalline film