JPS5893224A - Preparation of semiconductor single crystal film - Google Patents

Preparation of semiconductor single crystal film

Info

Publication number
JPS5893224A
JPS5893224A JP56190632A JP19063281A JPS5893224A JP S5893224 A JPS5893224 A JP S5893224A JP 56190632 A JP56190632 A JP 56190632A JP 19063281 A JP19063281 A JP 19063281A JP S5893224 A JPS5893224 A JP S5893224A
Authority
JP
Japan
Prior art keywords
film
substrate
single crystal
semiconductor
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56190632A
Other languages
Japanese (ja)
Inventor
Toshio Yoshii
俊夫 吉井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56190632A priority Critical patent/JPS5893224A/en
Publication of JPS5893224A publication Critical patent/JPS5893224A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02683—Continuous wave laser beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691—Scanning of a beam

Abstract

PURPOSE:To form a semiconductor single crystal thin film having excellent uniformity and flatness through epitaxial growth of a semiconductor film over an insulaing film form substrate by forming selectively a second insulating film on a semiconductor film of substrate surface and irradiating laser beams. CONSTITUTION:After forming a first SiO2 film 2 in the specified thickness by by thermal oxidation of an Si single crystal substrate 1, the film 2 is partly removed, exposing a part of the substrate 1. A polycrystalline Si film 3 is then deposited thereon by the CVD method under a reduced pressure and moreover a second SiO2 film 4 is deposited by the CVD method under a reduced pressure. Next, only the film 2 on the exposed substrate is selectively left by the photo- etching method and the remaining part is removed by the etching. Thereafter, a single crystal Si film 3' is formed from the substrate 1 to substrate 2 through the epitaxial growth by irradiating thereto a laser beam of the specified energy. The film 3' is formed as the semiconductor single crystal thin film having excellent uniformity and flatness, and an MOS transistor etc. is formed in the sperture of such film 3'.

Description

【発明の詳細な説明】 発明の属する技術分野 本発明は単結晶表面の一部に存在する絶縁性簿膜上に、
半導体表面から単結晶半導体薄膜を延在せしめる構造の
製造方法に関する。[Detailed description of the invention] Technical field to which the invention pertains The present invention relates to an insulating film existing on a part of a single crystal surface.
The present invention relates to a method for manufacturing a structure in which a single crystal semiconductor thin film extends from a semiconductor surface.

従来技術とその問題点 絶縁基板上の単結晶薄膜はＳＯＳ　（サファイア上のシ
リコン）の例でもわかるように、以下に述べるような利
徹をもつ。すなわち、■素子間分離金容易かつ完全に行
うことができる。■畜生浮遊容量が小さく、高速動作が
可能である。Ｃ）基板バイアス効果がないためＭＯ８集
積回路においてはスイッチング速度が大きくなる。Prior art and its problems Single crystal thin films on insulating substrates have the following advantages, as can be seen from the example of SOS (silicon on sapphire). That is, (1) isolation between elements can be easily and completely performed; ■The stray capacitance is small and high-speed operation is possible. C) Switching speeds are higher in MO8 integrated circuits due to the lack of body bias effects.

一方、ＳＯ８の間Ｍ　ａとして、基板となる単結晶サフ
ァイアのコストが高いことが挙げられる。On the other hand, as for Ma during SO8, it can be mentioned that the cost of single crystal sapphire serving as the substrate is high.

そのだめＳｉ基板を酸化して形成した５ｉ０２や、Ｓｉ
基板に堆積した９ｉ０２乃至はＳｉＮ膜上に半導体膜を
さらに堆積させたものを用いることが検討されている。However, 5i02, which is formed by oxidizing a Si substrate,
It is being considered to use a semiconductor film further deposited on a 9i02 or SiN film deposited on a substrate.

さらに、近年、レーザ光を細く絞り、半導体膜に照射す
るレーザアニール法が発達してきた。Furthermore, in recent years, a laser annealing method has been developed in which a laser beam is focused narrowly and irradiated onto a semiconductor film.

すなわち、８１基板上に被着しｆＣ８ｉＯｚ膜の一部を
除去することにより開孔部をもうけ、多結晶乃至は非結
晶Ｓ１を全面に被着し、８１基板表向から５Ｉ０２上ま
でＳＬ膜が連続して延在せしめる。次に、レーザ光を開
孔部上のＳＬ膜表面から５ｒ（Ｊｚ上上納結晶Ｓｉ向か
って走査しながら照射を行ない溶融再結晶化する。半導
体表面において溶融した多結晶Ｓｉは基板から液相エピ
タキシャル成長により単結晶化し、さらにこれが５ｉ０
２上に延在する多結晶Ｓ１にも及びレーザ光の走査と共
に８１の液相エピタキンヤル成侵がＳ　ｉＯｚ上を横方
向に向かって進行するというものである。しかしながら
、この方法には次のような欠へもある。すなわち、８区
と８１０２との熱伝導度の違いにより、レーザを照射し
た際の開孔部上の８１膜の温度とＳ　ｉＯｚ上のＳｉ膜
の高度が異なり、後者の方が前者よりも大きくなる。従
ってＳｉ膜が溶融再結晶する際に、８Ｉ０２七のＳｉ膜
が開孔部８１基板Ｈに集まるという現象が起こり、膜厚
の均一性、表面の平担性が維持できない。一方、これを
避けるために、レーザ光の照射エネルギーを少さくする
と、開孔部Ｓｉ基板上の多結晶Ｓｉ膜が溶融を起こさな
いため、多結晶３ｉ膜が、単結晶化しないという不都合
が起きる。That is, a hole is formed by removing a part of the fC8iOz film deposited on the 81 substrate, and polycrystalline or amorphous S1 is deposited on the entire surface, and the SL film is formed from the surface of the 81 substrate to the top of 5I02. Extend continuously. Next, the laser beam is irradiated while scanning from the surface of the SL film above the opening toward the crystalline Si above the opening to melt and recrystallize it. It is made into a single crystal by 5i0.
As the laser beam scans the polycrystal S1 extending on the SiOz layer, the liquid phase epitaxial growth 81 proceeds in the lateral direction on the SiOz layer. However, this method also has the following shortcomings. In other words, due to the difference in thermal conductivity between Section 8 and 8102, the temperature of the 81 film on the aperture and the altitude of the Si film on SiOz when irradiated with laser differ, and the temperature of the latter is larger than the former. Become. Therefore, when the Si film melts and recrystallizes, a phenomenon occurs in which the Si film of 8I027 gathers on the substrate H of the opening 81, and the uniformity of the film thickness and the flatness of the surface cannot be maintained. On the other hand, in order to avoid this, if the irradiation energy of the laser beam is reduced, the polycrystalline Si film on the Si substrate in the opening does not melt, resulting in the inconvenience that the polycrystalline 3i film does not become a single crystal. .

発明の目的 本発明Ｖｊこのような事情に鑑みてなされたもので、均
−性及び平担性においてすぐれた半導体単結晶薄膜を絶
縁膜上に形成する方法を提供するものである□ 発明の概委 本発明にお・いては、レーザ照射による半導体膜の幌Ｉ
Ｗ上昇を半導体基板上においても絶縁膜トにおいても同
一にせしむるため、半導体基板りの半導体膜のみに絶縁
膜を被着し、これによってレーザ光の透過率をこの部分
だけ大きくする。Purpose of the Invention The present invention has been made in view of the above circumstances, and provides a method for forming a semiconductor single crystal thin film with excellent uniformity and flatness on an insulating film. In the present invention, the hood I of the semiconductor film is formed by laser irradiation.
In order to make the increase in W the same on both the semiconductor substrate and the insulating film, an insulating film is applied only to the semiconductor film on the semiconductor substrate, thereby increasing the transmittance of laser light only in this portion.

発明の効果 この方法によって絶縁膜上に平担性のすぐれ、かつ、結
晶性も良好な半導体第結晶膜を形成することが出来、こ
の半導体層にすぐれた区気的特性をもつトランジスタな
どの素子を形成することかり能となった。このため、半
導体基板上に、立体的に集積回路を製造することができ
、集積度向上の効果が得られる。Effects of the Invention By this method, it is possible to form a semiconductor crystalline film with excellent flatness and good crystallinity on an insulating film, and this semiconductor layer can be used for devices such as transistors with excellent spatial characteristics. It became Noh. Therefore, an integrated circuit can be manufactured three-dimensionally on a semiconductor substrate, and the effect of improving the degree of integration can be obtained.

発明の実施列 以下実施例によりこれを説明する。第１図は本発明の一
実施例を示す図であるっＳ１単結晶（００１）母基板ｔ
ｌ＋を熱酸化し、１０００大の第一のＳ　ｉｏ２膜（２
）を形成後、部分的にとｉを除去し、８１基板を露出さ
せる。このトに減圧ＣＶＤ法を用いて多結晶Ｓ　ｒ　＋
３＋を５０（＋１３＆堆積する。さらに減圧ＣＶ　１）
法を用いてｆｌ、　二ノｓｉｕ２ｇ　（４）　ｔ　１０
００！　堆４４　Ｌ、　ｆｃ　ｔ、ＰｉＪ　Ｐ　ＩＮを
通してＳＬ基板露出五のＳ　ｉＯｚのみを選択的に践し
他はエツチングで取り去る（第１図（ａ））。次にＣＷ
発振Ａ「イオンレーザを照射する。このときのレーザパ
ワーは１１　Ｗ、走査速度は１０ｔ１／ｓｅｃである。DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be explained by way of examples. FIG. 1 is a diagram showing an embodiment of the present invention. S1 single crystal (001) mother substrate t
The first S io2 film (2
) is partially removed to expose the substrate 81. In this process, polycrystalline S r +
3+ to 50 (+13 & deposit. Further reduced pressure CV 1)
Using the method fl, Ninosiu2g (4) t 10
00! Only the exposed SiOz of the SL substrate is selectively etched through the layers 44L, fct, and PiJPIN, and the rest is removed by etching (FIG. 1(a)). Next, CW
Oscillation A: Irradiate with ion laser. The laser power at this time is 11 W and the scanning speed is 10 t1/sec.

これによって、開孔部Ｓｉ基板から隣接のＳ　ｉｏｚ膜
上に向かって堆積多結晶Ｓｉが単結晶化（３’）したｌ
１図（ｂ））。第二のＳ　ｉＯｚ膜を除去後、この単結
晶膜上にチャネル長１０μｍ、チャネル中間μｍのＳｉ
ゲートｎチャネルＭＯ８）ランラスタ（５）を試作し、
そのキャリア移動度を測定したところ８００ｄ／Ｖ−ｓ
ｅｃであり、バルク８ｉ　（００１）面の場合とほぼ同
等であった（第１図（Ｃ）　）　。As a result, the deposited polycrystalline Si becomes single crystallized (3') from the open Si substrate toward the adjacent SiOz film.
Figure 1 (b)). After removing the second SiOz film, Si with a channel length of 10 μm and a channel middle μm is deposited on this single crystal film.
Prototype gate n-channel MO8) run raster (5),
The carrier mobility was measured to be 800d/V-s.
ec, which was almost equivalent to that of the bulk 8i (001) plane (Fig. 1(C)).

発明の他の実施例 なお、上記実施例にち・いて基板及び半導体膜にＳｉを
用いたが、Ｇｅ、ＧａＡｓ、Ｇａ）’、ＡＪｚ０１　ｆ
ｚどでも本発明の効果を挙げることが出来ることはもち
ろんである。また絶縁膜の材料、形成方法などは一実施
例に限られないことは明らかである。レーザ光としては
Ａ「レーザに限らず、Ｋｒレーザ、Ｎｄ−ＹＡＧレーザ
、ルビーレーザなどであっても同様の効果を挙げること
ができる。Other Embodiments of the Invention Although Si was used for the substrate and semiconductor film in the above embodiments, Ge, GaAs, Ga)', AJz01 f
It goes without saying that the effects of the present invention can be obtained in any case. Furthermore, it is clear that the material, formation method, etc. of the insulating film are not limited to the one embodiment. The laser light is not limited to the A laser, but similar effects can be achieved even with Kr laser, Nd-YAG laser, ruby laser, etc.

【図面の簡単な説明】[Brief explanation of drawings]

第１図（ａ）乃至＜ｃ＞は本発明の詳細な説明する断面
図である０ １・・・Ｓ１単結晶基板、　　２・・・第１のＳ　ｉＯ
ｚ膜。 ３・・・多結晶１膜、　　　３′・・・単結晶８ｉ膜、
４・・・第２の８１０２ｇ％　　４・・・ＭＯ８トラン
ジスタ、６・・・ドレイン、　　　　７・・・ソース。 ８・・ゲート５ｉｎ２．　　　９・・・ゲートｉｔ極。1(a) to <c> are cross-sectional views explaining the present invention in detail. 0 1... S1 single crystal substrate, 2... First SiO
z membrane. 3... Polycrystalline 1 film, 3'... Single crystal 8i film,
4...Second 8102g% 4...MO8 transistor, 6...Drain, 7...Source. 8...Gate 5in2. 9...Gate it pole.

Claims (1)

【特許請求の範囲】[Claims] 半導体単結晶基板上に第１の絶縁膜を選択的に形成中る
工程と、前記基板表面及び絶縁膜上に半導体膜を被着す
る工程と、前記基板表面上に被着した牛４体膜に選択的
に第２の絶縁膜を形成する工程と、レーザ光を照射させ
ることにより、基板上から絶縁膜上にわたって前記半導
体膜ｔエピタキシャル成長せしめる工程とを具備してな
ることを特徴とする半導体単結晶膜の製造方法。a step of selectively forming a first insulating film on a semiconductor single crystal substrate; a step of depositing a semiconductor film on the surface of the substrate and the insulating film; and a step of depositing a semiconductor film on the surface of the substrate. A semiconductor unit comprising the steps of: selectively forming a second insulating film on the substrate; and epitaxially growing the semiconductor film t over the insulating film from the substrate by irradiating laser light. Method for producing crystalline film.
JP56190632A 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film Pending JPS5893224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56190632A JPS5893224A (en) 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56190632A JPS5893224A (en) 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film

Publications (1)

Publication Number Publication Date
JPS5893224A true JPS5893224A (en) 1983-06-02

Family

ID=16261291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56190632A Pending JPS5893224A (en) 1981-11-30 1981-11-30 Preparation of semiconductor single crystal film

Country Status (1)

Country Link
JP (1) JPS5893224A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60123019A (en) * 1983-12-07 1985-07-01 Agency Of Ind Science & Technol Manufacture of semiconductor device
JPS63215035A (en) * 1987-03-04 1988-09-07 Agency Of Ind Science & Technol Protective film for recrystallization treatment
US5950779A (en) * 1996-10-21 1999-09-14 Swany Corporation Bag mounted with casters

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57122534A (en) * 1981-01-22 1982-07-30 Mitsubishi Electric Corp Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57122534A (en) * 1981-01-22 1982-07-30 Mitsubishi Electric Corp Manufacture of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60123019A (en) * 1983-12-07 1985-07-01 Agency Of Ind Science & Technol Manufacture of semiconductor device
JPS63215035A (en) * 1987-03-04 1988-09-07 Agency Of Ind Science & Technol Protective film for recrystallization treatment
US5950779A (en) * 1996-10-21 1999-09-14 Swany Corporation Bag mounted with casters

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