JPS58118175A - Photocoupler - Google Patents

Photocoupler

Info

Publication number
JPS58118175A
JPS58118175A JP57000295A JP29582A JPS58118175A JP S58118175 A JPS58118175 A JP S58118175A JP 57000295 A JP57000295 A JP 57000295A JP 29582 A JP29582 A JP 29582A JP S58118175 A JPS58118175 A JP S58118175A
Authority
JP
Japan
Prior art keywords
light
light emitting
receiving element
emitting element
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57000295A
Other languages
Japanese (ja)
Inventor
Fumio Ichikawa
市川 二三夫
Yuki Shimada
島田 悠紀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP57000295A priority Critical patent/JPS58118175A/en
Publication of JPS58118175A publication Critical patent/JPS58118175A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/12Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof structurally associated with, e.g. formed in or on a common substrate with, one or more electric light sources, e.g. electroluminescent light sources, and electrically or optically coupled thereto

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

PURPOSE:To obtain a coupler appropriate for mounting on a hybrid IC substrate by a method wherein, on the same plane of the flat plate insulation substrate, a light emitting element and a light receiving element both having the electrode wiring pattern are provided, then these are coupled by a light reflection plane which is spatially positioned, or elements are respectively provided on individual substrates resulting in opposed manner to each other. CONSTITUTION:On the flat plate insulation small substrate 1 constituted of ceramic, etc., the semiconductor light emitting element chip 3 and the semiconductor light receiving element chip 3' are fixed respectively with light emitting and receiving planes upward, and electrode wirings 10 and 11 are connected respectively to the anode and the cathode of the chip 3. Besides, electrode 12, 13, and 14 are connected respectively to the base, the collector, and the emitter of a photo transistor the chip 3'. Thereafter, the light reflection space 5 generated above the chips 3 and 3' is covered with a semi-spherical light reflection plane 4 and surrounded by a sealing material 12, and accordingly these chips are photocoupled. Or, it is also available that these chips are provided on individual substrates, and then the light emitting and receiving planes of these elements are made opposed to each other at a fixed interval.

Description

【発明の詳細な説明】 この発明はフォトカプラに関するものであり、更に呼し
くは、混成集積回路基板に搭載するのに適した構造をも
つフォトカプラに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a photocoupler, and more particularly to a photocoupler having a structure suitable for being mounted on a hybrid integrated circuit board.

第1図(a) 、 (b)は、それぞれ従来の代表的な
フォトカプラの外観図である。第1図(a)に示したフ
ォトカプラは、キャン封止構造をとっており、大形であ
る上、端子構造が突出した足状の構造(図では5本足)
であるため、混成集積回路基板に搭載するには問題があ
る。また、第1図(b)に示したフォトカプラは、デュ
アルインライン形となつC(・るが、これまた全く同様
な事情により混成集積回路基板上へ搭載することは困難
であった。
FIGS. 1(a) and 1(b) are external views of typical conventional photocouplers, respectively. The photocoupler shown in Figure 1(a) has a can-sealed structure, is large in size, and has a protruding leg-like terminal structure (five legs in the figure).
Therefore, there is a problem in mounting it on a hybrid integrated circuit board. Further, the photocoupler shown in FIG. 1(b) is of a dual in-line type, but it was difficult to mount it on a hybrid integrated circuit board due to exactly the same circumstances.

この発明は、上述のような従来技術の問題点を解決する
ためになされたものであり、従ってこの発明の目的は、
混成集積回路基板上に搭載するのに適した構造のフォト
カプラを提供することにある。
This invention was made in order to solve the problems of the prior art as described above, and therefore, the purpose of this invention is to:
An object of the present invention is to provide a photocoupler having a structure suitable for being mounted on a hybrid integrated circuit board.

この発明の構成の要点は、フォトカプラにおいて、端子
構造を絶縁基板上に形成された電極配線パタンから成る
構造とし、更に発光素子と受光素子の配置に工夫をこら
して形状の小形化を図った点をこある。
The main points of the structure of this invention are that, in a photocoupler, the terminal structure is made up of an electrode wiring pattern formed on an insulating substrate, and furthermore, the arrangement of the light emitting element and the light receiving element is devised to reduce the size of the photocoupler. Make a point.

次に図を参照して本発明の詳細な説明する。The present invention will now be described in detail with reference to the drawings.

第2図は、本発明の一実施例を示す斜外観透視図である
。同図において、lはセラミック等により形成された平
板状絶縁小基板、2は平板状絶縁基板1の平面に密着し
た内部空間をもっ封止材、5は平板状絶縁基板1の平面
上方の封止材2の内部に形成した光反射空間で、その面
には反射材が形成されている。10〜14は、プリント
配線技術等を利用して平板状絶縁基板l上に任意に形成
されたII極配線バタンである。基板1の側面に露出し
た配線lO〜14は、そのまま外部電極となる。これら
10〜14の外部電極は混成集積回路基板200に搭載
する際の接続端子となる。
FIG. 2 is a perspective external perspective view showing one embodiment of the present invention. In the figure, l is a small flat insulating substrate made of ceramic or the like, 2 is a sealing material having an internal space that is in close contact with the flat surface of the flat insulating substrate 1, and 5 is a sealing material above the flat surface of the flat insulating substrate 1. A light reflecting space is formed inside the stopper 2, and a reflecting material is formed on the surface thereof. Reference numerals 10 to 14 denote II-pole wiring buttons arbitrarily formed on the flat insulating substrate l using printed wiring technology or the like. The wiring lines 10 to 14 exposed on the side surface of the substrate 1 serve as external electrodes as they are. These 10 to 14 external electrodes serve as connection terminals when mounted on the hybrid integrated circuit board 200.

第3図は、第2図における平板状絶縁基板1の表面斜視
図である。同図において、3は半導体発光素子チップ、
3′は半導体受光素子チップである。
3 is a front perspective view of the flat insulating substrate 1 in FIG. 2. FIG. In the figure, 3 is a semiconductor light emitting device chip;
3' is a semiconductor light receiving element chip.

これらの半導体チップは、発光面及び受光面を上方に向
けて、平板状絶縁基板平面上の電極配線パタンの所定位
置にマウントされている。この場合、配線電極10が発
光索子3のアノード、11がカソード、12が受光素子
3′であるフォトトランジスタのペース、13がコレク
タ、14がエミッタにそれぞれ接続されている。
These semiconductor chips are mounted at predetermined positions on the electrode wiring pattern on the plane of the flat insulating substrate, with the light emitting surface and the light receiving surface facing upward. In this case, the wiring electrode 10 is connected to the anode of the light emitting cable 3, 11 is connected to the cathode, 12 is connected to the paste of the phototransistor which is the light receiving element 3', 13 is connected to the collector, and 14 is connected to the emitter.

第4図は、(a)が第2図における平板状絶縁基板1の
平面図、(b)が#!2図に示すフォトカブラの正面断
面図、そして(e)が側面断面図である。
In FIG. 4, (a) is a plan view of the flat insulating substrate 1 in FIG. 2, and (b) is #! FIG. 2 is a front sectional view of the photocoupler shown in FIG. 2, and FIG. 2(e) is a side sectional view.

これらの図において、4は封止材2で形成された光反射
空間内壁に例えば、金属蒸着技術を用いて蒸着するなど
して形成されたメタライズ層の光反射面である。20は
平板状絶縁基板1の平面上における封止材2の密着面と
光反射空間との境界を示したものである。この場合の光
反射空間5は、発光素子3の発光面中心と、受光素子3
′の受光面中心の2点を焦点とする半楕円体空間から成
っている。
In these figures, reference numeral 4 denotes a light reflecting surface of a metallized layer formed on the inner wall of the light reflecting space formed by the sealing material 2 by, for example, vapor deposition using a metal vapor deposition technique. Reference numeral 20 indicates the boundary between the contact surface of the sealing material 2 and the light reflecting space on the plane of the flat insulating substrate 1. In this case, the light reflection space 5 is located between the center of the light emitting surface of the light emitting element 3 and the light receiving element 3.
It consists of a semi-ellipsoidal space whose focal points are two points at the center of the light-receiving surface of '.

かかる構造の反射形フォトカプラにおける光結合は、発
光素子3の表面から放射された光か、光反射空間5を通
り、光反射面4で反射したのち再び光反射空間5を通過
し受光素子3′に達することにより行われる。この場合
、光反射面、光反射空間は、それぞれ発光素子と受光素
子の位置する2点を焦点とした半楕円球面、半楕円体空
間となっているので、発光素子から放射された光は、他
のどの様な光反射面、光反射空間の組み合せよりも、効
54=良く受光素子に伝達することかできる。
Optical coupling in a reflective photocoupler with such a structure is achieved by either light emitted from the surface of the light emitting element 3, passing through the light reflecting space 5, being reflected by the light reflecting surface 4, passing through the light reflecting space 5 again, and then passing through the light receiving element 3. This is done by reaching ′. In this case, the light reflecting surface and the light reflecting space are a semi-ellipsoidal surface and a semi-ellipsoid space, respectively, with the two points where the light emitting element and the light receiving element are located as focal points, so the light emitted from the light emitting element is The light can be transmitted to the light receiving element more effectively than any other combination of a light reflecting surface and a light reflecting space.

なお、光反射空間をこついては、上述の実施例では半楕
円体空間であるものとして説明したが、この部分は、素
子の封止を兼ねた光透過性の物質で形成されていてもよ
く、また、その形状も任意であつ゛〔よい。
In addition, although the light reflection space was described as a semi-ellipsoidal space in the above embodiment, this part may be formed of a light-transmitting material that also serves as a seal for the element. Further, its shape may be arbitrary.

第5図(aJ 、 (b)は、それぞれ第4図の(b)
 、 CG)に対応させた断面図であるが、光反射空間
が効率の低いことさえ我慢すれば任意の形状でよいこと
を示したものである。
Figure 5 (aJ, (b) is the same as (b) in Figure 4, respectively)
, CG), which shows that the light reflection space can have any shape as long as it tolerates low efficiency.

;A6図は、本発明のさらに他の実施例を示す斜視図で
ある。この図では、発光素子からの光が反射板等を介す
ることなしに直接受光素子へ到達できる様な構造、いわ
ば、直接結合形の7オトカプラであって、混成集積回路
基板搭載に適した構造の実施例を示している。
Figure A6 is a perspective view showing still another embodiment of the present invention. This figure shows a structure that allows light from a light-emitting element to reach a light-receiving element directly without passing through a reflector, so to speak, a direct coupling type 7-oto coupler, which is suitable for mounting on a hybrid integrated circuit board. An example is shown.

この実施例では、発光索子3及び受光素子3午1、それ
ぞれ別々の絶縁体小基板110,120上に設置されて
いる。
In this embodiment, the light emitting element 3 and the light receiving element 3 are placed on separate insulating small substrates 110 and 120, respectively.

第6ffl(a)においては、発光素子3がL字形の絶
縁体基板110に実装され、該発光索子3のアノード、
カソードに接続される配線パタン22が、基板110の
左側面部にまで形成されている。基板110の右側面に
形成されている配線パタン21は、第6開山)に示す受
光側絶縁体基板120と一体化したあと、混成集積回路
基板200 (第6図C)へ搭載する際に用いられる接
続用端子である。
In the sixth ffl(a), the light emitting element 3 is mounted on the L-shaped insulator substrate 110, and the anode of the light emitting element 3,
A wiring pattern 22 connected to the cathode is formed up to the left side of the substrate 110. The wiring pattern 21 formed on the right side of the substrate 110 is used when mounting on the hybrid integrated circuit board 200 (FIG. 6C) after being integrated with the light-receiving side insulator substrate 120 shown in FIG. This is a connection terminal.

第6図中)は、受光素子3′を実装して℃・る絶縁体基
板120の構成を示す斜視図である。同図において、絶
縁体基板120は逆り字形断面を有し、唯今の例の受光
素子であるフォトトランジスタのエミッタ、ベース、コ
レクタへそれぞれ接続されている配線23が基板120
の右側面部まで遵するよう形成されている。
FIG. 6) is a perspective view showing the structure of an insulating substrate 120 on which a light-receiving element 3' is mounted. In the figure, an insulating substrate 120 has an inverted-shaped cross section, and wirings 23 connected to the emitter, base, and collector of a phototransistor, which is a light receiving element in the present example, are connected to the substrate 120.
It is formed so that it conforms to the right side of the

第6図(C)は、第611a(a)に示す基板110と
第6図(b)に示す基板120とを、発光素子3からの
光が直接受光素子3に到達するようにチップ実装面が互
に対向するように重ね合わせて一体化して成るフォトカ
ブラを実施例として示した斜視図である。同図において
、300は半田溶接部を示している。すなわちフォトカ
ブラは混成集積回路基板200上に半田接続技術尋を利
用して搭載されて(・る。但し、発光素子と受光素子の
対向位置が揃うように、配線パタンの設計を行う必要が
あることは論をまたない。配線パタン21と23が半田
接続により互いに接続されていることが理解されるであ
ろう。
FIG. 6(C) shows the substrate 110 shown in FIG. 611a(a) and the substrate 120 shown in FIG. FIG. 2 is a perspective view showing, as an example, a photocoupler which is formed by overlapping and integrating the photocouplers so that they face each other. In the figure, 300 indicates a solder weld. In other words, the photocoupler is mounted on the hybrid integrated circuit board 200 using solder connection technology.However, it is necessary to design the wiring pattern so that the opposing positions of the light emitting element and the light receiving element are aligned. It goes without saying that the wiring patterns 21 and 23 are connected to each other by solder connection.

なお、上述のようにして構成されたフォトカブラの両側
部における開放した面に、コーティングあるいは樹脂封
止等を施こし、内部にある発光素子と受光素子の光結合
に障害が生じないよう外部からの光を遮光する。
Note that the open surfaces on both sides of the photocoupler configured as described above are coated or sealed with resin, and are protected from the outside to prevent interference with optical coupling between the light-emitting element and the light-receiving element inside. Block out the light.

以上説明したとおり、本発明によれば絶縁基板上に7オ
トカプラが小形に形成されるので、セラミックス基板で
構成されるいわゆる混成集積回路′基板に容易に搭載で
きるという利点がある。
As explained above, according to the present invention, the 7-otocouplers are formed in a small size on an insulating substrate, so there is an advantage that they can be easily mounted on a so-called hybrid integrated circuit' substrate made of a ceramic substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)、Φ)はそれぞれ従来の代表的なフォトカ
ブラの外観図、第2図は本発明の一実施例を示す斜外観
透視図、第3図は第2図における平板状絶縁基板の表面
斜視図、第4図は(a)が第2図における平板状絶縁基
板の平面図、(b)が第2図に示すフォトカブラの正面
断面図、(C)が側面断面図、第5図(a) 、 (b
)はこの発明の他の実施例を示した正面符号説明 1・・・・・・平板状絶縁基板、2・・・・・・封止材
、3・・・・・・発光素子、3′・・・・・・受光素子
、4・・・・・・光反射面、5・・・・・・光反射空間
、10〜14および21〜23・・・・・・電極配線バ
タン、20・・・・・・平板状絶縁基板平面における封
止材と光反射空間の境界、110,120・・・・・・
絶縁体基板、200・・・・・・混成集積回路基板、3
00・・・・・・半田溶接部
Figures 1(a) and Φ) are external views of typical conventional photocouplers, Figure 2 is a perspective view of an embodiment of the present invention, and Figure 3 is a flat plate insulator in Figure 2. 4 is a perspective view of the surface of the substrate; (a) is a plan view of the flat insulating substrate in FIG. 2; (b) is a front sectional view of the photocoupler shown in FIG. 2; (C) is a side sectional view; Figure 5 (a), (b
) shows other embodiments of the present invention.Front numeral description 1...Flat insulating substrate, 2...Encapsulation material, 3...Light emitting element, 3' ...... Light receiving element, 4... Light reflecting surface, 5... Light reflecting space, 10 to 14 and 21 to 23... Electrode wiring button, 20. ... Boundary between the sealing material and the light reflection space on the plane of the flat insulating substrate, 110, 120 ...
Insulator substrate, 200... Hybrid integrated circuit board, 3
00・・・Solder welding part

Claims (1)

【特許請求の範囲】 1)平板状絶縁基板の同一平面上に発光素子と受光素子
とを設けると共に電極配線パタンを形成し、該発光素子
と受光素子の間を空間的に位置する光反射面によって光
結合し、さらに発光素子と受光素子をそれぞれ前記電極
配線パタンに接続して成ることを特徴とするフォトカプ
ラ。 2)発光素子を搭載すると共に、板面に形成された電極
配線パタンに該素子を接続して成る第1の絶縁基板と、
受光素子を搭載すると共に、板面に形成された電極配線
パタンに#素子を接続して成る第2の絶縁基板とを、前
記発光素子と受光素子が直接対向するように重ね合わせ
一体化して成ることを特徴とするフォトカプラ。
[Scope of Claims] 1) A light-reflecting surface that is provided with a light-emitting element and a light-receiving element on the same plane of a flat insulating substrate, and also forms an electrode wiring pattern, and is spatially located between the light-emitting element and the light-receiving element. What is claimed is: 1. A photocoupler characterized in that the photocoupler is optically coupled by a light emitting element and a light receiving element, and further connects a light emitting element and a light receiving element to the electrode wiring pattern. 2) a first insulating substrate on which a light emitting element is mounted and the element is connected to an electrode wiring pattern formed on the board surface;
A second insulating substrate on which a light-receiving element is mounted and a # element connected to an electrode wiring pattern formed on the board surface is stacked and integrated so that the light-emitting element and the light-receiving element directly face each other. A photocoupler characterized by:
JP57000295A 1982-01-06 1982-01-06 Photocoupler Pending JPS58118175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57000295A JPS58118175A (en) 1982-01-06 1982-01-06 Photocoupler

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57000295A JPS58118175A (en) 1982-01-06 1982-01-06 Photocoupler

Publications (1)

Publication Number Publication Date
JPS58118175A true JPS58118175A (en) 1983-07-14

Family

ID=11469905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57000295A Pending JPS58118175A (en) 1982-01-06 1982-01-06 Photocoupler

Country Status (1)

Country Link
JP (1) JPS58118175A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134059U (en) * 1985-02-12 1986-08-21
JPS61195073U (en) * 1985-05-27 1986-12-04
US4945391A (en) * 1986-05-06 1990-07-31 Mitsubishi Denki Kabushiki Kaisha Semiconductor device housing with laser diode and light receiving element
JP2005502205A (en) * 2001-08-31 2005-01-20 フェアチャイルド セミコンダクター コーポレイション Surface mountable optical coupling device package
WO2014034755A1 (en) * 2012-08-30 2014-03-06 京セラ株式会社 Light receiving/emitting element and sensor device using same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134059U (en) * 1985-02-12 1986-08-21
JPS61195073U (en) * 1985-05-27 1986-12-04
US4945391A (en) * 1986-05-06 1990-07-31 Mitsubishi Denki Kabushiki Kaisha Semiconductor device housing with laser diode and light receiving element
JP2005502205A (en) * 2001-08-31 2005-01-20 フェアチャイルド セミコンダクター コーポレイション Surface mountable optical coupling device package
WO2014034755A1 (en) * 2012-08-30 2014-03-06 京セラ株式会社 Light receiving/emitting element and sensor device using same
US9231127B2 (en) 2012-08-30 2016-01-05 Kyocera Corporation Light receiving and emitting element and sensor device using same
JPWO2014034755A1 (en) * 2012-08-30 2016-08-08 京セラ株式会社 Light emitting / receiving element and sensor device using the same

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