JPS58116751A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the stepwise difference of an electrode contacting window by forming the window at an insulating film, forming on the window a polycrystalline silicon film, a high melting point metal silicide and a resist film and uniformly etching the entire surface. CONSTITUTION:An electrode contacting window is formed at an insulating film 2 on a substrate 1, a polycrystalline silicon film 3 a high melting point metal silicide film 4 and a resist film 5 are formed on the overall surface, and the surface is flattened. Then, the entire surface is uniformly etched by a dry etching method, thereby allowing the films 3 and 4 to remain in the window, thereby flattening the surface. Then, metal wirings 6 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a preferred method 1 for manufacturing a semiconductor device having multilayer wiring.

General 12. 4tj/wiring of a semiconductor device forms an electrode contact window in an insulating film on a semiconductor substrate, and the ht='
4. Forming a bridge/wiring material film and turning it.

The electrodes/wirings formed in this way often break due to the large level difference between the edges of the electrode contact windows.

Therefore, in the past, various attempts have been made to reduce the effect of such level differences and prevent wire breaks, and although some techniques have achieved some degree of effectiveness, many of them require time-consuming processes or , there are various things such as those that are not effective, and there are many things that are not practical (
: There are few things offered.

The present invention provides a technique that can reliably reduce a level difference such as a ridge with a simple bridging process, and this will be explained in detail below.

FIGS. 1 to 4 are sectional views of main parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention, and the following will be described with reference to these figures.

See Figure 1 (1) For example, chemical vapor deposition on the semiconductor substrate 1! : A phosphosilicate glass (PSA) film 2 is formed to a thickness of about 7,000 mm (A).

・−.

The lath film 2 is patterned to form the electrode contact window 2.
Form A. (Although omitted in the diagram, Denbashi Contact)
;12A (:Surface 6 of exposed group IIjL1; is
Usually, a %" type impurity diffusion region is present.

$2 Refer to figure (5) Chemical vapor deposition method (two times@! Grow a polycrystalline silicon film to a thickness of, for example, about 500 (A). It is good to form such a polycrystalline silicon@5. This is to achieve good ohmic contact.

(4) A high melting point metal silicide film 4 is formed to a thickness of, for example, about 1 μm using a sputtering method.

(5) A resist WI45 is formed to a thickness of approximately 2 μm by spin coating. When formed to this degree of thickness, the surface becomes flat.

Refer to Figure 15 (6) The resist film 5, the high melting point metal sulfide 114, and the polycrystalline silicon film 6 are etched by a dry etching method such as a reactive ion etching method or an ion milling method.
is removed by etching, leaving the polycrystalline &V silicon layer and high melting point metal sulfide [14] only in the electric bridge contact window 2A shown in FIG. 1≦2.

Since this etching must be performed twice uniformly regardless of the material i, it is preferable to use a dry etching method with low selectivity. This can further improve performance. In this example, CJ'4 + Ox was used as the etchant.

(Force 5 (%) Temperature 1000 in Hv'Ar atmosphere
('C), heat treatment is performed for 50 minutes.

Refer to FIG. 4 (81) As described above, the metal wiring 6 is formed on the flat surface.

By the way, if such a process is adopted, the high melting point metal silicide film 4 seen in FIG. 2 will become the t-bridge contact seen in FIG. 12.4 level difference (=Therefore, overhang occurs in that part, and C in the IIE contact window 2A)
: A wedge-shaped biting part is formed, so step (6) (
If the dry etching in step 2 is shallow, the resist in the biting portion will have a negative effect on the surface condition of the filling line. In order to avoid this, it is better to adopt the embodiments described in relation to FIGS. 5 to 7 (2).

(See FIG. 5 C1) The steps up to the formation of the high melting point metal silicide film 4 are the same as the embodiments described in FIGS. 1 to 4 C:.

In this embodiment, a polycrystalline or non-doped polycrystalline silicon layer 7 is formed on the high melting point metal silicide film 4 to a thickness of, for example, 500 mm.
0 (A) degree ζ2 formation.

(2) Similar to the previous embodiment 1: The resist film 5 is formed to a thickness of, for example, about 2 [μ fathom] by spin coating.

Refer to Figure 6. (5) The resist film 5, polycrystalline silicon film 7, high melting point metal silicide film 4, and polycrystalline silicon film 3 are etched using a dry etching method to form electrode contact I: 2A (refer to Figure 1). ) The polycrystalline silicon layer 3 and the high melting point metal silicide film 4 are left only in the area. As a result, as described above, a wedge-shaped biting part 4' is formed in the high-melting-point metal silicide 4.However, since the content is polycrystalline silicon, there is no need to remove it; No cavities occur.

Refer to FIG. 7 (4) For example, by vapor deposition method (second, a metal film is formed and patterned by, for example, photolithography technology to form metal wiring 6).

In each of the above embodiments ζ, the high melting point metal silicide is
For example, tantalum (7'g), molybdenum (Mo).

Tungsten (14'), ? Silinides such as tan (Ti) can be used. In addition, when the high melting point metal silicide film 4 is deposited as it is, C: does not substantially become silicate C2, but at a subsequent temperature of 10LIO(
'C) becomes a complete silicide in one step.

As can be seen from the above description, the present invention C binary method involves forming an insulating film (two-electrode contact window) on a semiconductor substrate, and sequentially forming at least a polycrystalline silicon film and a high-melting point metal silicide film thereon. Then, a resist film is formed on the hill so that the surface becomes flat, and then the entire surface is etched uniformly by dry etching. Therefore, the polycrystalline silicon film is etched only within the electrode contact window. Since the high melting point metal silicide film is left to remain, the level difference in the electrode contact window is completely eliminated, and even if wiring is formed on the hill, there will be no disconnection.

[Brief explanation of the drawing]

FIGS. 1 to 4 and 5 to 7 are cross-sectional views of key parts of a semiconductor device at key process steps ζ: for explaining different embodiments of the present invention. In FIG. 42, 1 is a substrate, 2 is a phosphoborate glass film, 2A is an electrode contact window, 3 is a polycrystalline silicon film, 4 is a high melting point metal silicide film, 5 is a resist film, and 6 is a wiring. Figure 1] A Figure 2 Figure 3 Figure 4 Figure 6 Figure 5, Figure 6 Figure 7

Claims (1)

[Claims] A bridge contact window is formed on the insulating film, and then polycrystalline V
A silicon film is formed, then a high melting point metal silicide film is formed to fill at least the electric bridge contact window, and then a resist film is formed to flatten the surface, and then the entire surface is dry etched. uniform≦etching within the electrode contact window C; leave the polycrystalline V9 film and the high melting point metal silicide film to flatten the surface C;
1. A method for manufacturing a semiconductor device, comprising the steps of: