JPS58107956A - 乗算処理方式 - Google Patents
乗算処理方式Info
- Publication number
- JPS58107956A JPS58107956A JP56207872A JP20787281A JPS58107956A JP S58107956 A JPS58107956 A JP S58107956A JP 56207872 A JP56207872 A JP 56207872A JP 20787281 A JP20787281 A JP 20787281A JP S58107956 A JPS58107956 A JP S58107956A
- Authority
- JP
- Japan
- Prior art keywords
- register
- multiplication
- processing
- contents
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/527—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
- G06F7/5272—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56207872A JPS58107956A (ja) | 1981-12-22 | 1981-12-22 | 乗算処理方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56207872A JPS58107956A (ja) | 1981-12-22 | 1981-12-22 | 乗算処理方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58107956A true JPS58107956A (ja) | 1983-06-27 |
| JPH0252291B2 JPH0252291B2 (enExample) | 1990-11-13 |
Family
ID=16546939
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56207872A Granted JPS58107956A (ja) | 1981-12-22 | 1981-12-22 | 乗算処理方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58107956A (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04123774A (ja) * | 1990-09-13 | 1992-04-23 | Nec Corp | 半導体装置用ソケット |
-
1981
- 1981-12-22 JP JP56207872A patent/JPS58107956A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0252291B2 (enExample) | 1990-11-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4525796A (en) | Pipelined operation unit for vector data | |
| US5457805A (en) | Microcomputer enabling high speed execution of product-sum operation | |
| US4954947A (en) | Instruction processor for processing branch instruction at high speed | |
| CN110914800B (zh) | 基于寄存器的复数处理 | |
| US5946222A (en) | Method and apparatus for performing a masked byte addition operation | |
| US4677582A (en) | Operation processing apparatus | |
| JPH07107664B2 (ja) | 乗算回路 | |
| JPS58107956A (ja) | 乗算処理方式 | |
| JPH0560629B2 (enExample) | ||
| US4862405A (en) | Apparatus and method for expediting subtraction procedures in a carry/save adder multiplication unit | |
| JPS6310263A (ja) | ベクトル処理装置 | |
| JP2643279B2 (ja) | 情報処理装置 | |
| JPS63111535A (ja) | デ−タ処理装置 | |
| JPS6162174A (ja) | 情報婦理装置 | |
| JPH0792902A (ja) | プログラマブルコントローラ | |
| JPS6236255B2 (enExample) | ||
| JP2001005664A (ja) | 演算処理装置 | |
| JPH0588893A (ja) | 並列演算処理装置 | |
| JPH0222417B2 (enExample) | ||
| JPH02188887A (ja) | パケット結合・分離方式 | |
| JPS61101835A (ja) | 除算回路 | |
| JPS6347834A (ja) | 先行制御方式 | |
| JPS61133476A (ja) | 演算回路 | |
| JPH04268639A (ja) | ディジタル信号処理プロセッサ | |
| WO2002071254A2 (en) | A method and system for processing matrices of complex numbers and complex fast fourier trasformations |