JPS58107721A - Analog-to-digital converter - Google Patents

Abstract

PURPOSE:To attain high speed conversion for multi-channel input, by providing two sets of integrators and providing another input signal to the other integrator while the output of one integrator is counted, in an A/D converter of the double integral system. CONSTITUTION:An input channel is selected at a multiplexer MP and given to integrators IG1, IG2. While the integrator IG1 integrates an input signal, the integrator IG2 integrates a reference voltage -Es. The signal inputted to the integrator IG2 is A/D-converted while the time required for the output voltage of the integrator IG2 until it returns to the original level is counted. After a prescribed time, the switch is changed over, the integrator IG1 is integrated at the reference voltage -Es and the other channel signal is given to the integrator IG2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is an analog-to-digital converter using a double integration method, and is capable of converting multiple channels of analog input into digital signals at high speed. The purpose is to provide equipment.

FIG. 1 is a connection diagram of a conventional analog-to-digital converter using a double integration method for converting multi-channel analog input into digital signals, and FIG. 3 is an operating waveform diagram thereof.

As is well known, analog-to-digital conversion using the double integration method consists of an integrator IG made up of an amplifier A, a capacitor C, and an input resistor R, as shown in Figure 1, a reference voltage source ±E8, and a comparator COMP. In the case of multiple channels, a multiplexer MP is added to this. S□, S-, S+, and SR are analog switches, and these switches are shown in Figure 5 (b),
It is turned on and off at intervals shown in (ri, 2). t□
, t2181. indicates the elapsed time. The analog input EXl of the first channel ch1 selected by the multiplexer 1 is at time t1. During t2, the integrator IG
It is integrated by

After time t2, integrator IG integrates reference voltage -E8,
When integrator IG returns to its original level at time t3, comparator COMp detects it. The output of the integrator IG is shown in (c) of FIG. The digital conversion of the input EX□ of the first channel cb□ is as shown in (e) of Fig. 3.
Within the period of integrating the reference voltage -E8, that is, from t2 to t
This is done by counting clock pulses for a period of 3 seconds. Thereafter, the integrator IG integrates the reference voltage -E8 for the period t3 to t3't. The period from t2 to t3+,
That is, the period during which the reference voltage -E8 is applied to the integrator IG is set to a constant value, and this period is equal to or equal to the period (t□~12) during which the integrator IG integrates the input Ex□. is selected to be large. When the time t, 1 has elapsed, the integrator IG is reset, and the input EX2 of the second channel ch2 is now selected by the multiplexer immediately. The input EX□ is integrated for a period from t4 to t5, and then the integrator IG integrates the reference voltage -E8 for a certain period from t5 to t6I. The digital conversion of the second channel input Ex2 is 15
．． It will be held during the 16th period.

Similarly, the integration of the input and the integration of the reference voltage E8 are performed alternately, and the digital conversion of the channel is performed within the integration period of the reference voltage E8. Note that in the first item, 6 and SR indicate a reset switch for the integrator IG.

The digital converter does not perform a gain conversion operation during the period when the input to be converted Ex is being integrated. This input integration time to be converted is selected to be an integer multiple of one power supply cycle in order to provide integrality with respect to the wrap-around from the power supply. Therefore, double integration type analog-to-digital converters are resistant to power supply noise, but the
) has the disadvantage that the number of analog-to-digital conversions that can be processed is small. As a result, it is not necessarily satisfactory as an analog-to-digital converter for devices such as data loggers that have a large number of channels to be converted. The above-mentioned problems have been solved by being used for digital conversion processing.

Figure 2 shows the analog-to-digital converter of the present invention. .

This is a block diagram of an embodiment of an integrator IG in the circuit of FIG.
2 and analog switch S81'SI2"S2'"
C is added. Each switch is turned on and off at time intervals of ti to (to) and (to) to) in FIG. 4, and the integrator IG1. The output of IG2 is shown in Figure 4 (c)
Indicated by and (b). That is, from time t□ to t2, switch 81. (Other switches are off. Also, so is connected to IIQI+) and the input E of the first channel ch□
Integrate x□ with integrator IG□. After time t□~t2, turn off switch SI, turn on Ssx, S-, s
o is connected to II'' and the reference voltage -E8 is applied to the integrator IG1 for integration during a fixed time period t2 to t3' which is longer than or equal to t□ to t2.

The output of integrator IG□ returns to its original level at time t3, which is output by comparator COMP.

Digital conversion of the input hx□ of the first channel ah□ is performed by counting the period between <t2 and t3 using clock pulses, as shown in (G) in FIG. On the other hand, between time t2 and t2I, integrator IG2 is reset and its ff
The switch SI2 is turned on for a period from 1t2° to t3' (equal to t-t2), and the integrator G2 integrates the second channel ch2O, input "I2. Therefore, the period during which this human power EX2 is integrated is The digits will change within t2 to i31, which integrates the reference voltage -E8 of the first channel ch□.After the time t2'-t3I has elapsed, switch s2 is turned off from time t3I to t5. , Es2
．． Turn on s-, connect S to ll0I+, and integrator NG
2 to integrate the reference voltage -E8. t3' ”-t5
The 0 period is equal to t2 to 13+ described above. Integrator IG2
returns to its original level at time t5I, which is detected by comparator COM. 2nd channel ch2
The digital conversion of the input EX2 is as shown in Fig. 4).
This is done by counting the period t3I-t51 using clock pulses. Next, reset the integrator G1 for 4 hours from time t1 to t, and then for 1 hour from t□ to t2I.
Between t4 and t5, which are equal to t21, t31, the switch S is turned on and the integrator IG1 selects the first channel ah.
Integrate the input EX3 of □. Therefore, this human power Ex
The integration of 3 is performed within the period t3t-t5 during which the reference voltage -E8 of the second channel ch2 is integrated. Time t4~
After t5 has elapsed, the next period of time from t5 to t6I is switch S.
I□ off r Ssx, S- on - Sc++
1 ++ and integrates the reference voltage -Es with the integrator IG□. This period from t5 to t6" is the period from t2 to t mentioned above.
3I, t3I-t5 and similar.

The output of integrator IG□ returns to its original level at time t6, which is detected by comparator COM. Digital conversion of the third channel ch3 is performed by counting the period from t5 to t6 using clock pulses, as shown in (G) in FIG. I'll be criticized. Similarly, integrator IG1
During the period from t5 to t, l during which the integrator IG2 integrates the reference voltage -E8 of the third channel Ch3, the integrator IG2 integrates the input EX4 of the fourth channel ch4. The same process is repeated thereafter.

In this way, in the present invention, the double integral method analog
Two integrators are used in a digital converter, and while one integrator is integrating the reference voltage for the converted input of one channel, the other integrator is integrating the converted input of the next channel. Since the configuration is configured to perform the conversion and to perform the conversion alternately, the idle time for digital conversion is shortened. Therefore, even if the integration time of the input to be converted is an integral multiple of the power supply cycle and the period of the stomach pulse is the same as before, digital processing can be performed approximately twice as much as the conversion operation of the conventional converter. Therefore, the analog-to-digital converter of the present invention is suitable for use in equipment that handles multi-channel input, such as a data logger. Furthermore, although the converter of the present invention has more integrators and analog switches than the converter shown in Figure 1, parts that require precision such as the resistor R, R8, and reference power supply engineer 'E8 are shared. , it can be realized without much increase in cost.

In the case of the analog φ digital converter according to the present invention, the capacitance difference between the capacitors C and C2 of the integrators IG1 and IG2 is not related to the count number of digital conversion, and the difference in the capacitance between the integrators IG and IG2 is due to the offset of the integrators IG and IG2. Since the difference can be compensated for by carrying out the calculation before digital conversion, the integrator IG1.
It has the characteristics that there is no difference in the digital conversion value depending on K and when it passes through lG2.

[Brief explanation of the drawing]

Figure 1 shows a conventional analog-to-digital converter.
S block diagram, FIG. 2 is a block diagram of the analog-to-four-digital converter of the present invention, FIG. 3 is an operating waveform diagram of FIG. 1,
FIG. 4 is an operational waveform diagram of FIG. 2. Ding...Multiplexer, IGl, lG2-...Integrator, ±Es...Reference voltage source, COMP...Comparator. 4th Chief

Claims (1)

[Claims] It has an integrator that integrates the input to be converted for a certain period of time and then integrates a reference voltage of opposite polarity to the input to be converted for a certain period of time that is equal to or longer than this input integration time, and the output of this integrator returns to the original level. In a double-integration type analog-to-digital converter that converts the input to be converted into a digital signal by digitally counting the period during which the reference voltage is integrated until it returns to , a second integrator is provided, and one An analog-to-digital converter in which, during a period in which one integrator is integrating a reference voltage for an input to be converted of a channel, an input to be converted of the next channel is integrated by another integrator.