JPS55130230A - Analog-digital converter - Google Patents

Analog-digital converter

Info

Publication number
JPS55130230A
JPS55130230A JP3785779A JP3785779A JPS55130230A JP S55130230 A JPS55130230 A JP S55130230A JP 3785779 A JP3785779 A JP 3785779A JP 3785779 A JP3785779 A JP 3785779A JP S55130230 A JPS55130230 A JP S55130230A
Authority
JP
Japan
Prior art keywords
integrator
switch
noise component
analog
delivered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3785779A
Other languages
Japanese (ja)
Inventor
Seiichi Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3785779A priority Critical patent/JPS55130230A/en
Publication of JPS55130230A publication Critical patent/JPS55130230A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0626Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
    • H03M1/0631Smoothing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters

Abstract

PURPOSE:To obtain an A/D converter which is used for the data collector or the like with no effect of the noise component, by using the integrator capable of setting the initial state. CONSTITUTION:Analog signal Ai containing the noise component is supplied to the integrator with initial state setting consisting of resistance R, switch SW2, capacitor C and amplifier A3 each and via amplifier A2 and switch SW1. The intergrator delivers the input signal via switch SW1 after integration for a fixed time, and thus the analog voltage is delivered with the reduced effect of noise component. This output of the integrator is applied to A/D converter circuit AD via sample holding circuit SH and then delivered in the form of digital signal Do.
JP3785779A 1979-03-30 1979-03-30 Analog-digital converter Pending JPS55130230A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3785779A JPS55130230A (en) 1979-03-30 1979-03-30 Analog-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3785779A JPS55130230A (en) 1979-03-30 1979-03-30 Analog-digital converter

Publications (1)

Publication Number Publication Date
JPS55130230A true JPS55130230A (en) 1980-10-08

Family

ID=12509206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3785779A Pending JPS55130230A (en) 1979-03-30 1979-03-30 Analog-digital converter

Country Status (1)

Country Link
JP (1) JPS55130230A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195835U (en) * 1983-06-13 1984-12-26 株式会社明電舎 High noise resistance A/D conversion circuit
JPS6066132U (en) * 1983-10-13 1985-05-10 三洋電機株式会社 AD conversion circuit
JPS60113532A (en) * 1983-11-24 1985-06-20 Sharp Corp Ad converter
JPS63126320A (en) * 1986-10-07 1988-05-30 クリスタル セミコンダクター コーポレーション Method of suppressing influence of electric noise upon analog-digital converter
JP3003660U (en) * 1994-04-28 1994-10-25 アデックス株式会社 Analog / digital converter
JP2008541576A (en) * 2005-05-05 2008-11-20 アナログ デバイシーズ インク Accurate and low noise improved analog / digital converter system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4994257A (en) * 1973-01-10 1974-09-06
JPS4995560A (en) * 1972-10-24 1974-09-10

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4995560A (en) * 1972-10-24 1974-09-10
JPS4994257A (en) * 1973-01-10 1974-09-06

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59195835U (en) * 1983-06-13 1984-12-26 株式会社明電舎 High noise resistance A/D conversion circuit
JPS6066132U (en) * 1983-10-13 1985-05-10 三洋電機株式会社 AD conversion circuit
JPS60113532A (en) * 1983-11-24 1985-06-20 Sharp Corp Ad converter
JPS63126320A (en) * 1986-10-07 1988-05-30 クリスタル セミコンダクター コーポレーション Method of suppressing influence of electric noise upon analog-digital converter
JP3003660U (en) * 1994-04-28 1994-10-25 アデックス株式会社 Analog / digital converter
JP2008541576A (en) * 2005-05-05 2008-11-20 アナログ デバイシーズ インク Accurate and low noise improved analog / digital converter system

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