JPS5582540A - Analog digital conversion unit - Google Patents

Analog digital conversion unit

Info

Publication number
JPS5582540A
JPS5582540A JP15836078A JP15836078A JPS5582540A JP S5582540 A JPS5582540 A JP S5582540A JP 15836078 A JP15836078 A JP 15836078A JP 15836078 A JP15836078 A JP 15836078A JP S5582540 A JPS5582540 A JP S5582540A
Authority
JP
Japan
Prior art keywords
output line
converter
conversion unit
digital conversion
analog digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15836078A
Other languages
Japanese (ja)
Inventor
Akimitsu Amano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teac Corp
Original Assignee
Teac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teac Corp filed Critical Teac Corp
Priority to JP15836078A priority Critical patent/JPS5582540A/en
Publication of JPS5582540A publication Critical patent/JPS5582540A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To enable A/D conversion of high accuracy, by correcting the zero point variation with a simple circuit constitution, when analog signal is converted into digital signal.
CONSTITUTION: The common output line 9 of the input selection switching circuit 4 which selectively picks up the analog input signals 2, 3 and zero signal 1 is coupled to the A/D converter 11 via the DC amplifier 10. Further, since the output line 14 of the register 13 holding the data obtained from the A/D converter 11 and the output line 12 of the A/D converter 11 are coupled to the digital subtraction circuit 15, the measuring data corrected for zero point variation is obtained on the output line 16 of the digital subtraction circuit 15.
COPYRIGHT: (C)1980,JPO&Japio
JP15836078A 1978-12-19 1978-12-19 Analog digital conversion unit Pending JPS5582540A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15836078A JPS5582540A (en) 1978-12-19 1978-12-19 Analog digital conversion unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15836078A JPS5582540A (en) 1978-12-19 1978-12-19 Analog digital conversion unit

Publications (1)

Publication Number Publication Date
JPS5582540A true JPS5582540A (en) 1980-06-21

Family

ID=15669963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15836078A Pending JPS5582540A (en) 1978-12-19 1978-12-19 Analog digital conversion unit

Country Status (1)

Country Link
JP (1) JPS5582540A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0645942A (en) * 1991-06-21 1994-02-18 Crystal Semiconductor Corp Ratio analog-to-digital converter correcting non-ratio offset
JP2000134096A (en) * 1998-10-27 2000-05-12 Nec Corp Successive comparison type a/d converter
JP2012039194A (en) * 2010-08-03 2012-02-23 Sharp Corp A/d converter, solid-state image pickup device and electronic information apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0645942A (en) * 1991-06-21 1994-02-18 Crystal Semiconductor Corp Ratio analog-to-digital converter correcting non-ratio offset
JP2000134096A (en) * 1998-10-27 2000-05-12 Nec Corp Successive comparison type a/d converter
JP2012039194A (en) * 2010-08-03 2012-02-23 Sharp Corp A/d converter, solid-state image pickup device and electronic information apparatus

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