JPS58106853A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS58106853A JPS58106853A JP56203754A JP20375481A JPS58106853A JP S58106853 A JPS58106853 A JP S58106853A JP 56203754 A JP56203754 A JP 56203754A JP 20375481 A JP20375481 A JP 20375481A JP S58106853 A JPS58106853 A JP S58106853A
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- wires
- lead frame
- plated film
- lead
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
- H01L23/49582—Metallic layers on lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
Description
【発明の詳細な説明】
本俺−は半導体装置の製造に周込るリードフレームＫｌ
ｌする。[Detailed Description of the Invention] This invention is a lead frame Kl used in the manufacture of semiconductor devices.
I do it.
レシン七−ルド薯の半導体装置の製造においては、一般
にリードフレームか１＠−られている。リードフレーム
は、銅や鉄−エラクル系等の薄−金属板を積置プレスや
エツチング加工でパターニングすることｋよってＳａす
れ、電気回路素子（ベレット）を取り付けるタブおよび
ワイヤを取り付けるリードを有して−る。−プ訃よびリ
ードの振絖Ｎ（ボンディングＩＩ）は婁続性向上のため
ｋ。In the manufacture of lead-based semiconductor devices, lead frames are generally assembled. A lead frame is made by patterning thin metal plates such as copper or iron by stacking press or etching, and has tabs for attaching electric circuit elements (bellets) and leads for attaching wires. -ru. - Bonding and reed bonding N (bonding II) is k to improve continuity.
一般＜銀メッキ膜で被、ている。銀メッキｌ［Ｋあ１て
は、光沢メツ中膜は接続性が悪−仁とから、従来、この
銀メッキ膜は接続性（ボンダビリティ）の良好な純銀か
らなる無光沢メッキによって形成して−る。General <Covered with silver plating film. Silver plating l [K1] Since the glossy middle film has poor connectivity, conventionally, this silver plating film was formed by matte plating made of pure silver with good connectivity (bondability). -ru.
しかし、この無光沢メッキ膜はボンダビリティは高−か
下地保■性が低く、リードフレーム母材（′ＷＡ材）の
瞭化鋳止性が低い。この友め、下地保■性を良好とす養
ためｋは無光沢メッキ膜を最小ｔ、ＯＡ１ｇａ（ａｌｌ
造時の厚さバラツキを考慮した場合。However, this matte plating film has high bondability but low base retention, and has low clear castability of the lead frame base material ('WA material). In order to maintain good base retention, the matte plating film should be coated with a minimum of t, OA1ga (all
When considering thickness variations during manufacturing.
Ｂ、５Ｊ１１１）必要とし、銀使用量の多さからし工す
−ドフＶ−ムコストが高くなる難点がある。B, 5J111), and the disadvantage is that the production cost increases due to the large amount of silver used.
したがって、本竜嘴の目的は下亀保■性、 ＊＊性が高
くかつ銀使用量の少ない製造コストの安い９−ドフレー
ムを搗供することｋある・このような目的を達成するた
めに本慟明は、金属素材の、（ＩＩＩＫＩＩメッキ厘を
形成してなる１１−ドアｍ／−ムにお−て、前記金属素
材の主面Ｋ１ｌｌ１着食は他の金属を介して光沢銀メッ
キ膜を形成すると−と４に、この光沢銀メ！キＩＩＸ±
に無光沢銀メッキ属を形成してなるものであって、以下
実施例により本発明を説明する。Therefore, the purpose of Honryuzoku is to provide a low-cost 9-frame frame with high durability and low manufacturing cost with less silver usage.To achieve this purpose, Honryuzoku In an 11-door m/-m formed of a metal material (IIIKII plating film), the main surface K1ll1 of the metal material is coated with a bright silver plating film through other metals. When formed, - and 4, this glossy silver plate! Ki IIX±
The present invention will be described below with reference to Examples.
＄１１１１１は本発明の一実施例によるレジンモールド
薯トランジスタ用のリードフレームを示す平面図であり
、第２ＷＪは第１図のＩ−璽１ｌｉＫ沿う一部の拡大断
面図である。＃Ｉ１図に示すように、このリードフレー
ム１０単位ブロックは、それぞれ先端が幅広となる細長
の３本のリード２〜４と、これらリード２〜４を連結す
る外枠Ｓ＞よびダム片６とからなっている。各リード２
〜４は相互に平行となるとともに、後端部分でリード２
〜４に直交する方向に延在する外枠５によって連結され
て＾る。ダム片６は前記外枠ＳＫ千行に延びるとともに
、各リード２〜４の中間部で連結され、外枠５とともに
リード２〜４を支持する補強部材となっている。また、
ダム片６はレジンモールド時のレジンの流出を防止する
ダムの働きをする。Reference numeral 11111 is a plan view showing a lead frame for a resin molded transistor according to an embodiment of the present invention, and 2nd WJ is an enlarged cross-sectional view of a portion taken along line I-1liK in FIG. As shown in Figure #I1, this lead frame 10 unit block includes three elongated leads 2-4 each having a wide tip, an outer frame S> and a dam piece 6 that connect these leads 2-4. It consists of each lead 2
~4 are parallel to each other, and lead 2 is connected at the rear end.
They are connected by an outer frame 5 extending in a direction perpendicular to .about.4. The dam piece 6 extends along the outer frame SK and is connected at the intermediate portion of each lead 2 to 4, and serves as a reinforcing member that supports the leads 2 to 4 together with the outer frame 5. Also,
The dam piece 6 functions as a dam to prevent resin from flowing out during resin molding.
−万、中央のり−ド３は；レクタ用リードとなり、先端
の幅広部は電気回路素子（ペレット）７を取り付けるタ
ブ８を形作って込る。両側の１７−ド２．４はニオツタ
用リードあるいはベース用リードとなり、それぞれ先端
の幅広部はワイヤ９を接続するパッドｌＯを形作ってい
る。また、このリードフレームｌは第２図に示すように
、母材１１はたとえｔ！０．４５閣の厚さの鋼板からな
るとどもに％タブ８およびリード２．４のパッド１０表
面には光沢銀メッキ膜１２を介して無光沢銀メツ中膜４
３が形成されている。光沢銀メッキ膜１！は鎖にアンチ
モン（８ｂ）を含有させたものであり、その厚さはたと
えば１．３μｍとなっていて、その膜は緻密となり、下
地（母材）保護性が高い。- 10,000 The center glue 3 becomes a lead for the rectifier, and the wide part at the tip forms a tab 8 for attaching an electric circuit element (pellet) 7. The 17-domains 2.4 on both sides serve as leads for Niotsuda or base leads, and the wide portions at the tips of each form pads 10 to which wires 9 are connected. In addition, as shown in FIG. 2, this lead frame 1 has a base material 11 even if the base material 11 is t! It is made of a steel plate with a thickness of 0.45 cm, and the surface of the pad 10 with a tab 8 and a lead 2.4 is coated with a matte silver plating film 4 via a bright silver plating film 12.
3 is formed. Shiny silver plating film 1! The chain contains antimony (8b), and its thickness is, for example, 1.3 μm, and the film is dense and highly protective of the base material.
１１大、無党沢銀メッキ膜１３は純銀からなり、その厚
さはえとえば０．２８ｍと薄い。この無党沢銀メツ中膜
１ｓは表面が鏡面とならず微視的に見れば凹凸が多いこ
とから、ペレット７やワイヤ９との１鏡性が高−０
この１５なり−ドフレームｌを用いてのトランジスタの
製造にあっては、第１１１に示すようＫ。11, the non-porous silver plating film 13 is made of pure silver, and its thickness is as thin as, for example, 0.28 m. Since the surface of this mutsuzawa silver mesh media 1s is not mirror-like and has many irregularities when viewed microscopically, the mirror properties with the pellets 7 and wires 9 are high. In the manufacture of transistors using K, as shown in No. 111.
タブ８上にペレット７を固定した後、ペレット７の電極
とこれに対応するリード２．４のパッドｌＯとをワイヤ
（金縁）９で優絖し、その後、ペレット７、ワイヤ９を
含むリード先端部をレジン峰−ルドしてレジンパッケー
ジ１４で封止する。After fixing the pellet 7 on the tab 8, the electrode of the pellet 7 and the corresponding pad 10 of the lead 2.4 are connected with a wire (gold edge) 9, and then the tip of the lead containing the pellet 7 and the wire 9 is connected. The portion is covered with resin and sealed with a resin package 14.
つ−で、図示はしないが、不要となるダム片６および外
枠５を切断除去して、レジンモールド層のトランジスタ
を製造する。Although not shown, unnecessary dam pieces 6 and outer frame 5 are cut and removed to manufacture a resin molded transistor.
このようなリードフレームｌは、下地保躾性の優れた光
沢銀メッキ膜１２を下層にすることによって、ベレット
中ワイヤの＊ａ時の熱によるリードフレーム母材の酸化
（この酸化はリード先端部の皐が加熱されることからタ
ブ、パッド部で生じる・）を防止して−る。ｔた。上層
はボンダビリティの良好な無党沢鎖メッキ膜１３として
いることから、ペレット７および９イヤ９との接続性は
強く剥離しＳい。し食がって１歩留の向上、信頼性の向
上が図れる。This type of lead frame l has a bright silver plating film 12 with excellent base maintenance properties as the lower layer, so that the lead frame base material is oxidized by the heat at *a of the wire in the pellet (this oxidation occurs at the lead tip). This prevents damage caused by the tabs and pads from heating up. It was. Since the upper layer is a non-porous chain plating film 13 with good bondability, the connectivity with the pellets 7 and 9 ears 9 is strong and does not peel off. It is possible to improve the yield and reliability by increasing the amount of energy.
１また。このリードフレームｌは下地保−は光沢鎖メＶ
命属１２で行なうため、銀メッキ属全体の厚さはたとえ
ば１．５μｍと従来の３．５μｍＫ比較して大幅に薄く
できる。この結果、銀の使用量を低減で會ることから、
リードフレームの製造コストを軽減できる。1 again. This lead frame has a glossy chain V
Since the thickness of the silver plating is 12, the total thickness of the silver plating can be made significantly thinner, for example, 1.5 .mu.m, compared to the conventional 3.5 .mu.mK. As a result, since the amount of silver used is reduced,
Lead frame manufacturing costs can be reduced.
なお、本発明は前記実施例に限定されるものではなく１
本発明の技術思想に基１／Ｔｈ”（変形可能である。た
とえば、光沢銀メッキ膜を形成する添加金属は、８ｂ以
外の８ｅ、８．８ｎ等でもよい。It should be noted that the present invention is not limited to the above-mentioned embodiments.
Based on the technical idea of the present invention, 1/Th" (can be modified. For example, the additive metal forming the bright silver plating film may be 8e, 8.8n, etc. other than 8b.
１また、嬉３図に示すように、光沢銀メッキ膜１２と母
材１１との聞にニッケル膜１５を介在させて鎖メッキ膜
と母材との密着性（１１合性）を向上させるよ５Ｋして
もよい。1 In addition, as shown in Figure 3, a nickel film 15 is interposed between the bright silver plating film 12 and the base material 11 to improve the adhesion (11 compatibility) between the chain plating film and the base material. You can also do 5K.
さらに１本発明は他の半導体装置、ＩＣ（集積−路装置
）用のリードフレームにも適用できることは勿論である
。Furthermore, it goes without saying that the present invention can also be applied to lead frames for other semiconductor devices and ICs (integrated circuit devices).
以上のように、本発明によれば、下地保護性。As described above, according to the present invention, the base protection property can be improved.
ＩＩ続性が高くかつ製造コストが安価となる＋７−ドフ
レームｖＩｌ供することができる。It is possible to provide a +7-frame vIl with high II continuity and low manufacturing cost.
ＩＥｌｌｌ！の簡単な＠＠
菖１ｓは本発明の一実施例によるリードフレームの平［
図、第２図は第１図のＩ−１繰に沿う一部の拡大新面図
、第３図は他の実施ｆ／ｇＫよるり−ドフレームの一部
の拡大断面図である。IEllll! The simple @@ iris is the flat surface of the lead frame according to an embodiment of the present invention.
2 is an enlarged new view of a part along the I-1 line in FIG. 1, and FIG. 3 is an enlarged sectional view of a part of another f/gK twisted frame.
１・・・リードフレーム、２〜４・・・リード、ト・・
外枠、６・・・ダム片、７・・・ベレット、８・・・タ
ブ、９・・・ワイヤ、１０・・・パッド、１１・・・母
材、１２・・・光沢銀メッキ膜、１３・・・無光沢銀メ
ッキ膜、１４・・・レジンパッケージ、１５・・・ニッ
ケル膜。1... Lead frame, 2-4... Lead, To...
Outer frame, 6... Dam piece, 7... Bellet, 8... Tab, 9... Wire, 10... Pad, 11... Base material, 12... Bright silver plating film, 13... Matte silver plating film, 14... Resin package, 15... Nickel film.
、ど。フ 第 ｌ 図 に 第２図 第 ３ 図 １ψ,degree. centre Figure l to Figure 2 Figure 3 1ψ
Claims (1)
フレームＫｋ％／％℃、前記金属素材の主面に直ＩＩ會
たは他の金属を介して光沢銀メッキ膜を形成するととも
Ｋ、この先沢銀メッキ属上に無光沢銀メッキ膜を形成し
てなることを特徴とするり一ドフレーム。1. Lead frame Kk%/%℃ formed by forming a silver plating film on the main surface of a metal material, when a bright silver plating film is formed on the main surface of the metal material directly or through another metal. K. A bonded frame characterized by forming a matte silver plating film on the Sakizawa silver plating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56203754A JPS58106853A (en) | 1981-12-18 | 1981-12-18 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56203754A JPS58106853A (en) | 1981-12-18 | 1981-12-18 | Lead frame |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58106853A true JPS58106853A (en) | 1983-06-25 |
| JPS6366427B2 JPS6366427B2 (en) | 1988-12-20 |
Family
ID=16479279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56203754A Granted JPS58106853A (en) | 1981-12-18 | 1981-12-18 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58106853A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60130651U (en) * | 1984-02-13 | 1985-09-02 | 凸版印刷株式会社 | lead frame |
| EP0731505A3 (en) * | 1995-03-06 | 1998-04-15 | Motorola, Inc. | Semiconductor leadframe structure and method of manufacturing the same |
| JP2001230453A (en) * | 1999-12-08 | 2001-08-24 | Nichia Chem Ind Ltd | Led lamp and its manufacturing method |
| EP3462482A1 (en) * | 2017-09-27 | 2019-04-03 | Nexperia B.V. | Surface mount semiconductor device and method of manufacture |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5373969A (en) * | 1976-12-14 | 1978-06-30 | Toshiba Corp | Lead frame for semicinductor |
| JPS53108757A (en) * | 1977-03-04 | 1978-09-21 | Matsushita Electric Ind Co Ltd | Coding method |
| JPS5596662A (en) * | 1979-01-17 | 1980-07-23 | Toshiba Corp | Electronic component member |
-
1981
- 1981-12-18 JP JP56203754A patent/JPS58106853A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5373969A (en) * | 1976-12-14 | 1978-06-30 | Toshiba Corp | Lead frame for semicinductor |
| JPS53108757A (en) * | 1977-03-04 | 1978-09-21 | Matsushita Electric Ind Co Ltd | Coding method |
| JPS5596662A (en) * | 1979-01-17 | 1980-07-23 | Toshiba Corp | Electronic component member |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60130651U (en) * | 1984-02-13 | 1985-09-02 | 凸版印刷株式会社 | lead frame |
| EP0731505A3 (en) * | 1995-03-06 | 1998-04-15 | Motorola, Inc. | Semiconductor leadframe structure and method of manufacturing the same |
| JP2001230453A (en) * | 1999-12-08 | 2001-08-24 | Nichia Chem Ind Ltd | Led lamp and its manufacturing method |
| EP3462482A1 (en) * | 2017-09-27 | 2019-04-03 | Nexperia B.V. | Surface mount semiconductor device and method of manufacture |
| US11728179B2 (en) | 2017-09-27 | 2023-08-15 | Nexperia B.V. | Surface mount semiconductor device and method of manufacture |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6366427B2 (en) | 1988-12-20 |
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