JPS58103144A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain the semiconductor device enabled to obtain sufficient inside insulation, as well as greatly facilitated for assembling by a method wherein between a metal plate to be mounted with a semiconductor element and a metal plate for radiation of heat to constitute a part of an outside case is adhered to be connected, and is insulated by a low melting point glass layer. CONSTITUTION:The transistor to be used as the semiconductor element 1 is adhered to the nickel plated copper electrode plate 3 by a collector metal electrode side PbSn solder material 2 consisting of a Ti/Ni layer, and moreover the substrate electrode 3a having a nickel plating layer 3b is adhered to the radiator plate 6a of the outside case having a nickel plating layer 6b by the low melting point glass layer 7. Accordingly, because only the low melting point glass layer 7 excepting the nickel plating layer 3b, 6b is interposed between the substrate electrode 3a and the radiator plate 6a consisting of the same metal, and the low melting point glass layer 7 is constituted of nearly symmetrical structure at the adhering parts although thickness and the area are different, uniform adhesion can be realized easily.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to electrical insulation between a semiconductor element substrate and a case in a semiconductor device.

Reducing the size and weight of electrical equipment is due to the miniaturization of various electronic components,
In particular, semiconductor devices that handle high voltages and large currents, such as high-power transistors, handle large voltages and currents. It is generally used in circuit parts close to the output side, and requires electrical and thermal safety measures. Therefore, in high-density packaging, various efforts have been made to improve the mounted circuit structure and the performance of semiconductor devices. 0 For example, in high-power transistors, the transistor element substrate is often bonded to a metal plate with high thermal conductivity using solder to reduce thermal resistance and increase heat dissipation efficiency. When mounted on an exterior body (referred to as a chassis), generally a mica plate or other insulating sheet is often interposed between the chassis and the metal plate of the case of the transistor device to electrically insulate them from each other.

In such a conventional configuration, extra members are added to the semiconductor device, and the process for high-density packaging becomes complicated. Furthermore, for example, a mica plate or other sheet of insulating material is interposed between the ground side of the chassis and a Coos metal plate directly connected to the collector of a conventional transistor, thus creating a capacitance between the chassis and the collector. Therefore, high-frequency current flows to the chassis through the capacitance, resulting in a decrease in device performance (increase in leakage current and output noise).

Furthermore, in order to cope with higher packaging density and to improve performance and safety, a structure in which an insulating member of a ceramic substrate such as alumina or beryllia is provided inside a semiconductor device is known.

In such a semiconductor device, since the insulating member is provided between the transistor substrate and its supporting metal plate, the insulating plate ALL can be made smaller, and the capacitance formed between the semiconductor element and the chassis can be reduced. Furthermore, due to internal insulation, the transistor and the metal case are electrically insulated, resulting in an extremely safe structure. FIG. 1 shows a conventional example of a semiconductor device having such a structure. The semiconductor device has an internally insulated structure using a ceramic substrate as an insulating member, and the semiconductor element 1 has a collector side surface covered with a solder material 2 such as Pb5n or MuUSB.
Otherwise, it is brazed to the metal 3& coated with the plating layer 3b. The metal plate 3& is brazed to the ceramic substrate 4a using a solder material 6a via a metallized layer 4b, such as a MOMn or W layer, formed on the ceramic substrate 4&. Furthermore, a plating layer 6 is applied to the heat sink 6, which is a part of the ceramic substrate 4Fζ case.
It is bonded to solder material 6b via b.

By the way, in a semiconductor device having such a conventional structure, the brazing material 51L, sb between the ceramic substrate, the metal substrate electrode, and the metal heat sink of the outer case causes bubbles to form near the interface between the ceramic substrates. It was found that this was an obstacle to heat dissipation.

Moreover, a brazing material 51L is placed between the substrate electrode 3a and the heat sink 6a.
, ceramic substrate 44. The provision of the brazing material 6b complicates assembly, making this internally insulated semiconductor device expensive.

The present invention was made in order to eliminate such conventional drawbacks, and a low melting point glass layer is provided between the metal plate on which the semiconductor element is mounted and the heat dissipation metal plate that becomes a part of the external case. The present invention provides a semiconductor device which is adhesively connected and insulated by the method.

Examples of the present invention will be described in detail below.

FIG. 2 shows a cross-sectional view of a glass bonding part of an internally insulated semiconductor device according to the present invention, and FIG. 1 shows a conventional example.
The same numbers are given to the same parts as in the figure.

The transistor as the semiconductor element 1 is made of, for example, TiZ.
The collector metal electrode side consisting of the ai layer is bonded to a nickel-plated copper electrode plate 3 with a Pb5n brazing filler metal 2.

A substrate electrode 3a having a nickel plating layer 3b is bonded to a heat dissipation plate 6a of the outer case having a nickel plating layer 6b through a low melting point glass layer a.

That is, the substrate electrode 3a on which the semiconductor element 1 is placed and the heat sink 6a of the external case are bonded to each other via the low melting point glass layer 7.

According to this embodiment, in addition to the nickel plating layers 3b and 6b, only the low melting point glass layer 7 is interposed between the substrate electrode 3a made of the same metal and the heat sink 62L. Although the layer 7 has a different thickness and area, it has a symmetrical structure at the bonding portion, so uniform bonding can be easily achieved.

The low melting point glass adhesive layer in the semiconductor device of this example had a thickness of about 0.2 mm, and could be formed in almost the same area as the transistor substrate. Low melting point glass is PbO, B2
A lead borosilicate glass containing O5, the softening point is approximately 400.
The thermal expansion coefficient of 'C' is 150X10''/'C.It is close to the thermal expansion coefficient of copper, which is used for semiconductor element substrate electrodes and heat sinks that are part of the external case, so thermal processing such as bonding is Inconveniences such as peeling or cracking of the glass rarely occur.

When this low melting point glass is used, the process of brazing the semiconductor element to the substrate electrode with Pb5n solder and the process of bonding the electrode to the glass can be performed at the same time, simplifying the process. For bonding, a plate-shaped low-melting point glass preformed to a predetermined area and thickness is used.

Low melting point glass serves as both an insulating material and an adhesive material, and the thickness of the glass layer must be kept as thin as possible while maintaining the necessary dielectric strength, so that the thermal resistance is almost the same as that of conventional solder-bonded ceramic plates. As is clear from the above description, the semiconductor device according to the present invention can obtain the following effects.

(1) Sufficient internal insulation can be obtained.

(2) Since the low-melting glass serves as both an insulating material and an adhesive, assembly is very easy.

In the above description, a transistor was used as an example, but it goes without saying that the present invention can be applied not only to transistors but also to internally insulated semiconductor devices.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a conventional semiconductor device, and FIG. 2 is a sectional view of a semiconductor device according to an embodiment of the present invention. Brazing material for elements. 3a---Semiconductor element substrate electrode, sb---
・Semiconductor element substrate electrode nickel plating layer, 4a...
...Insulating ceramic substrate, 4b...Insulating ceramic substrate metallized layer, 5a, 5b...
Brazing material for adhesion, 63... Heat sink, eb...
...Nickel plating layer of heat sink, 7...Low melting point glass.

Claims (3)

[Claims] (1) A semiconductor device characterized in that a metal plate on which a semiconductor element substrate is adhesively mounted and a metal plate of an external case are bonded via a low melting point glass layer. (2) The semiconductor device according to claim 1, wherein the low melting point glass has a composition of PbO-B20s. (3) The semiconductor device according to claim 1, wherein the metal plate on which the semiconductor element substrate is adhesively mounted and the metal plate of the outer case are made of a nickel-plated steel plate.