JPS58102539A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPS58102539A
JPS58102539A JP20124281A JP20124281A JPS58102539A JP S58102539 A JPS58102539 A JP S58102539A JP 20124281 A JP20124281 A JP 20124281A JP 20124281 A JP20124281 A JP 20124281A JP S58102539 A JPS58102539 A JP S58102539A
Authority
JP
Japan
Prior art keywords
layer
recess
etching
substrate
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP20124281A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0249017B2 (enExample
Inventor
Tetsuya Ogawa
哲也 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP20124281A priority Critical patent/JPS58102539A/ja
Publication of JPS58102539A publication Critical patent/JPS58102539A/ja
Publication of JPH0249017B2 publication Critical patent/JPH0249017B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)
JP20124281A 1981-12-14 1981-12-14 半導体装置の製造方法 Granted JPS58102539A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20124281A JPS58102539A (ja) 1981-12-14 1981-12-14 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20124281A JPS58102539A (ja) 1981-12-14 1981-12-14 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58102539A true JPS58102539A (ja) 1983-06-18
JPH0249017B2 JPH0249017B2 (enExample) 1990-10-26

Family

ID=16437691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20124281A Granted JPS58102539A (ja) 1981-12-14 1981-12-14 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58102539A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62183531A (ja) * 1986-02-07 1987-08-11 Nippon Telegr & Teleph Corp <Ntt> エツチングによる平坦化膜の形成方法
US6624044B2 (en) 2000-05-16 2003-09-23 Denso Corporation Method for manufacturing semiconductor device having trench filled with polysilicon
JP2020102592A (ja) * 2018-12-25 2020-07-02 トヨタ自動車株式会社 半導体装置の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5664453A (en) * 1979-10-31 1981-06-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5664453A (en) * 1979-10-31 1981-06-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62183531A (ja) * 1986-02-07 1987-08-11 Nippon Telegr & Teleph Corp <Ntt> エツチングによる平坦化膜の形成方法
US6624044B2 (en) 2000-05-16 2003-09-23 Denso Corporation Method for manufacturing semiconductor device having trench filled with polysilicon
JP2020102592A (ja) * 2018-12-25 2020-07-02 トヨタ自動車株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
JPH0249017B2 (enExample) 1990-10-26

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