JPS58101343A - 乗算方式 - Google Patents

乗算方式

Info

Publication number
JPS58101343A
JPS58101343A JP56199554A JP19955481A JPS58101343A JP S58101343 A JPS58101343 A JP S58101343A JP 56199554 A JP56199554 A JP 56199554A JP 19955481 A JP19955481 A JP 19955481A JP S58101343 A JPS58101343 A JP S58101343A
Authority
JP
Japan
Prior art keywords
carry
register
bit
sum
adder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56199554A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6250853B2 (cg-RX-API-DMAC7.html
Inventor
Hideo Miyanaga
宮永　秀雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56199554A priority Critical patent/JPS58101343A/ja
Publication of JPS58101343A publication Critical patent/JPS58101343A/ja
Publication of JPS6250853B2 publication Critical patent/JPS6250853B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
JP56199554A 1981-12-11 1981-12-11 乗算方式 Granted JPS58101343A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56199554A JPS58101343A (ja) 1981-12-11 1981-12-11 乗算方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56199554A JPS58101343A (ja) 1981-12-11 1981-12-11 乗算方式

Publications (2)

Publication Number Publication Date
JPS58101343A true JPS58101343A (ja) 1983-06-16
JPS6250853B2 JPS6250853B2 (cg-RX-API-DMAC7.html) 1987-10-27

Family

ID=16409752

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56199554A Granted JPS58101343A (ja) 1981-12-11 1981-12-11 乗算方式

Country Status (1)

Country Link
JP (1) JPS58101343A (cg-RX-API-DMAC7.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811269A (en) * 1985-10-09 1989-03-07 Hitachi, Ltd. Bit slice multiplication circuit
US5136537A (en) * 1991-11-19 1992-08-04 Advanced Micro Devices, Inc. Method and apparatus for determining the product of two numbers

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5638590U (cg-RX-API-DMAC7.html) * 1979-08-31 1981-04-11

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5638590U (cg-RX-API-DMAC7.html) * 1979-08-31 1981-04-11

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4811269A (en) * 1985-10-09 1989-03-07 Hitachi, Ltd. Bit slice multiplication circuit
US5136537A (en) * 1991-11-19 1992-08-04 Advanced Micro Devices, Inc. Method and apparatus for determining the product of two numbers

Also Published As

Publication number Publication date
JPS6250853B2 (cg-RX-API-DMAC7.html) 1987-10-27

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