JPS58100437A - Method for checking lsi - Google Patents

Abstract

PURPOSE:To enable to monitor the function of an inside gate of the LSI according to the plural ways and moreover rapidly only by adding one pin by a method wherein the checking function of the inside gate and the function at normal use are made to be provided to the pin. CONSTITUTION:A signal s of the inside gate intending to be outputted is inputted into a tri-state output buffer circuit 1, and when a change-over signal H is outputted from an outside terminal 6 for change-over, a check signal is generated as output at an outside terminal 5 for common use of the check signal/a normal signal, and can be confirmed. Moreover when a change-over signal L is outputted from the outside terminal 6 for change-over, the tri-state buffer circuit 1 is made to be in the high impedance condition, and the normal signal inputted from the outside terminal 5 for common use can be obtained from the output terminal of an AND gate circuit 3 through an input buffer circuit 2.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an effective checking method for manufacturing inspection of LSI.

After manufacturing an LSI, to check its functionality before shipping, a signal is applied to the input pin and the result is checked at the output pin.

Therefore, if you want to check the function of the internal f-) of an LSI, conventionally you can check its status using the output pin after passing through several stages, or you can directly send a signal from the internal dart to the output pin. There were two instructions on how to take it out.

In the former case, as shown in Figure 1, the internal darts 01 to G
6, for example, the state of point A, there are many input pins p, xp related thereto.

No input setting is required, and it is output to the input pin PTO for the first time. In the latter case, as shown in Figure 2,
A dedicated pin Pr is required for this purpose, and that pin Pr is not normally used. Therefore, if a large number of such circuits are provided, it would be very wasteful to provide a dedicated pin for each.

In addition, in the figure, FF indicates frizzoflo, zo. In addition, as shown in Figure 3, when the counter C1*C2... continues to have 0 stages (3 stages in the figure), there is a drawback that 2n clocks are required to check the output of the final stage. .

In order to eliminate such conventional drawbacks, the present invention has the following features:
By effectively utilizing the limited pins of the SI, one pin can have two functions: the function of checking internal dirt during post-manufacturing inspection, and the original function during normal use. By simply increasing the number of pins by one pin, a large number of internal dart functions can be monitored quickly, and failures inside the LSI can be checked in advance, making it possible to provide highly reliable LSIs in the field. is something,
An embodiment of the present invention will be described below in detail with reference to the drawings. Fig. 4 is an embodiment showing a method for checking the LSI of the present invention.
In particular, it is a configuration diagram when it is desired to output the state of internal goo. As shown in the figure, the check signal at-Ls inside the LSI
I Connect the tri-state output 2277 circuit 1 for outputting to the outside and the input 2 buffer circuit 2 for inputting the normal signal from outside the LSI into the LSI, and the connection point is connected to the external terminal 5 which is commonly used for normal/check. Connected. On the other hand, an AND gate circuit 3 that blocks the output of the input buffer circuit 2 when the tri-state output buffer circuit 1 is in the logic output state is inserted and connected between the input 2 buffer circuit 2 and the subsequent logic circuit, and State output 2277
The circuit 1 is provided with an external switching terminal 6 for controlling its output state. Note that the signal is input to one input of the AND gate circuit 3 via an inverter circuit 4 connected to an external switching terminal 6. Then, the internal f-) signal 8 to be output is input to the tri-state output cover and F circuit 1, and when the switching signal rHJ is output from the switching external terminal 6, a check signal is sent to the signal/normal signal common external terminal 5. It appears as output and can be confirmed. Furthermore, when the switching signal "L" is output from the switching external terminal 6, the tri-state output 2277 circuit 1 is not in a high impedance state, and the normal signal input from the common external terminal 5 passes through the input 2 buffer circuit 2. A normal signal is obtained from the output of the AND gate circuit 3.

FIG. 5 is a block diagram showing another embodiment of the method for checking the LSI of the present invention, particularly when a checking signal is desired to be input. That is, the switching signal from the check signal/normal signal switching external terminal 6 in the circuit shown in FIG. 4 is input via the inverter circuit 4, and one input to the AND gate circuit 3 is directly input from the switching external terminal 6 This is how it was done. On the left, the same circuit components as in FIG. 4 are given the same reference numerals.

Therefore, the check signal you want to input is
When the normal signal is input from the common external terminal 5 and the switching signal of the check signal/normal signal switching external terminal 6 is set to "H", the tri-state output 2277 circuit 1 goes into a high impedance state, and the input cover and filter circuit 2 A check signal is obtained from the output of the AND gate circuit 3. When the switching external terminal 6 is set to rLJ, the normal signal passes through the tri-state output 2277 circuit 1 and is output as a normal signal to the check signal/normal signal common external terminal 5. Therefore, when the counter has consecutive 0 stages as shown in FIG. 3, it is particularly effective to input data to intermediate stages using this method. Furthermore, as shown in FIG. 6, in the case of the combinational circuits shown in FIGS. 4 and 5, it is also possible to share the switching external terminal 14 and increase the input/output of check signals to nearly the total number of pins of the maximum LSI. .

At present, the degree of integration of LSIs is increasing, but it is becoming increasingly difficult to check whether the internal f-) is functioning properly at the time of shipment due to the limited number of pins. In this case, just by increasing the number of terminals for switching between check, receiver, and normal functions by one bin as in the present invention, not only the conventional signal check but also the same number of internal functions can be checked. -) It is possible to input and output check signals, which has the effect of shortening inspection time and increasing reliability at the time of shipment.

[Brief explanation of the drawing]

FIGS. 1, 2, and 3 are explanatory circuit diagrams showing a conventional LSI checking method, respectively, and FIGS. 4 and 5 are circuit configuration diagrams each showing an embodiment of the checking method of the present invention. Fig. 4 shows a circuit that outputs and confirms the internal dart check/resignal to the outside, Fig. 5 shows an example of the circuit when it is desired to input the check/return signal inside the circuit, and Fig. 6 shows the circuit shown in Fig. 4. FIG. 6 is a circuit configuration diagram when the function shown in FIG. 5 is performed using a 1-pin switching terminal. 1... Tri-state output buffer circuit, 2-... Input buffer circuit, 3... And dart circuit, 4...
Inverter circuit, 5, 8 to 13...Check signal/normal signal common external terminal, 6.14...Check signal/normal signal switching external terminal. Figure 1 Figure 4 Figure 5 Figure 6

Claims (1)

[Claims] A tristate output 8277 circuit for outputting a normal signal (or check signal) inside the LSI to the outside of the LSI and an input buffer circuit for inputting a check signal (or normal signal) from outside the LSI into the LSI are connected. The connection point is connected to an external terminal commonly used for normal/check, and a dirt circuit is connected to the input puffer circuit and a subsequent stage to block the output of the input cover and fa circuit when the tri-state output puff completion circuit becomes a logic output state. and a switching external terminal for controlling the output state of the tri-state output 8277 circuit.
By inputting a control signal from the switching external terminal to put the tri-state output 8277 circuit in a high impedance output state, a check signal can be input or a check signal can be taken from the normal/check/re common external terminal. Out, LS
An LSI checking method characterized by checking I.