JPS5799083A - Coding method - Google Patents
Coding methodInfo
- Publication number
- JPS5799083A JPS5799083A JP17459280A JP17459280A JPS5799083A JP S5799083 A JPS5799083 A JP S5799083A JP 17459280 A JP17459280 A JP 17459280A JP 17459280 A JP17459280 A JP 17459280A JP S5799083 A JPS5799083 A JP S5799083A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- run length
- outputted
- outputs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/41—Bandwidth or redundancy reduction
- H04N1/411—Bandwidth or redundancy reduction for the transmission or storage or reproduction of two-tone pictures, e.g. black and white pictures
- H04N1/413—Systems or arrangements allowing the picture to be reproduced without loss or modification of picture-information
- H04N1/419—Systems or arrangements allowing the picture to be reproduced without loss or modification of picture-information in which encoding of the length of a succession of picture-elements of the same value along a scanning line is the only encoding step
Abstract
PURPOSE:To enable decoding in high speed, by decoding only throygh retrieval of the decoding table once per signal one bit. CONSTITUTION:A memory 3 storing a modified Haffmann code (MH code) decoding table is accessed with a signal (d) outputted from an address generating circuit 1, signal (c) outputted from a reception data storage circuit 2 and signal (e) outputted from a black-and white signal generating circuit 6 to output the signals (f)-(h). When the signal (f) is at H level and the signal h is at L level, a gate 9 outputs a latch instruction signal i to a run length latch circuit 4. When the signals (f) and (h) are both at H level, a gate 10 outputs a latch instruction signal h' to a run length latch circuit 5. A facsimile signal generating circuit 7 outputs write-in clock (m) the same number as the run length loaded in a line memory 8 and resets the run length latch circuits 4, 5. The line memory circuit 8 forms a facsimile signal and stores it with a white-and-black signal (e) and the write-in clock (m).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17459280A JPS5799083A (en) | 1980-12-12 | 1980-12-12 | Coding method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17459280A JPS5799083A (en) | 1980-12-12 | 1980-12-12 | Coding method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5799083A true JPS5799083A (en) | 1982-06-19 |
JPH0377708B2 JPH0377708B2 (en) | 1991-12-11 |
Family
ID=15981254
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17459280A Granted JPS5799083A (en) | 1980-12-12 | 1980-12-12 | Coding method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5799083A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178873A (en) * | 1983-03-30 | 1984-10-11 | Fujitsu Ltd | Decoding system of coded data |
JPS6098768A (en) * | 1983-11-04 | 1985-06-01 | Sony Corp | Decoding method of run length code |
JPS61139069U (en) * | 1985-02-18 | 1986-08-28 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5266315A (en) * | 1975-11-25 | 1977-06-01 | Hell Rudolf Dr Ing Gmbh | Method of digitally coding continuous video information transmitting time |
-
1980
- 1980-12-12 JP JP17459280A patent/JPS5799083A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5266315A (en) * | 1975-11-25 | 1977-06-01 | Hell Rudolf Dr Ing Gmbh | Method of digitally coding continuous video information transmitting time |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59178873A (en) * | 1983-03-30 | 1984-10-11 | Fujitsu Ltd | Decoding system of coded data |
JPS6098768A (en) * | 1983-11-04 | 1985-06-01 | Sony Corp | Decoding method of run length code |
JPS61139069U (en) * | 1985-02-18 | 1986-08-28 |
Also Published As
Publication number | Publication date |
---|---|
JPH0377708B2 (en) | 1991-12-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0593763A4 (en) | Maximum likelihood decoding method and device thereof. | |
JPS5799083A (en) | Coding method | |
JPS5579565A (en) | Picture signal decoding system | |
EP0123896A3 (en) | Character and video mode control circuit | |
KR840002780A (en) | Pages Receiver | |
KR960002010A (en) | Memory Circuitry Performing Sequential Access Operations | |
JPS5528141A (en) | Memory unit of electronic computer | |
JPS57153373A (en) | Electronic interpreter | |
JPS57111669A (en) | Output system for conjugation form of word | |
JPS579170A (en) | Method and apparatus for picture processing | |
JPS55136753A (en) | Compressed data recovery system | |
JPS56117479A (en) | Decoding system | |
JPS5665569A (en) | Coding system for video signal | |
JPS57135498A (en) | Semiconductor memory | |
KR870004583A (en) | ADPCM codec circuit using digital signal processor | |
JPS5586237A (en) | Bit rate conversion system | |
JPS57135539A (en) | Bit collation circuit | |
JPS5736331A (en) | Bus line device | |
KR920013146A (en) | Fieldbus Interface Board | |
JPS5769413A (en) | Programmable logic controller | |
JPS5782297A (en) | Semiconductor storage device | |
JPS56153444A (en) | Parallel-to-series conversion circuit | |
JPS5511651A (en) | Code error correction device | |
JPS6479792A (en) | Memory | |
KR920022116A (en) | Apparatus and method for transmitting and receiving data between multiprocessors |