JPS5798200A - Processing system for memory access fault - Google Patents
Processing system for memory access faultInfo
- Publication number
- JPS5798200A JPS5798200A JP55174590A JP17459080A JPS5798200A JP S5798200 A JPS5798200 A JP S5798200A JP 55174590 A JP55174590 A JP 55174590A JP 17459080 A JP17459080 A JP 17459080A JP S5798200 A JPS5798200 A JP S5798200A
- Authority
- JP
- Japan
- Prior art keywords
- fault
- reexecution
- circuit
- inputted
- memory access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Retry When Errors Occur (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To prevent a memory access fault from being latent, and to prevent it from becoming a permanent fault, by requesting an interruption by means of reexecution of hardware, to a fault which is not permanent, and monitoring and recording it by software. CONSTITUTION:When a CPU4 is reading out a data to a memory 1, its data is inputted to a parity error detecting circuit 48, and when an error is detected, a reexecution request signal RT is inputted to a controlling circuit 40. As a result, the circuit 40 discriminates occurrence of the error, finishes the read-out operation, and designates the same address without intervention of software, by which reexecution as hardware is performed. In this way, in case when the reexecution is normal, a low level interruption request signal LI is inputted to the circuit 40, and address information related to said fault, and the number of times of occurrence of the interruption request are recorded by the prescribed software processing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55174590A JPS5798200A (en) | 1980-12-12 | 1980-12-12 | Processing system for memory access fault |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55174590A JPS5798200A (en) | 1980-12-12 | 1980-12-12 | Processing system for memory access fault |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5798200A true JPS5798200A (en) | 1982-06-18 |
JPS6130303B2 JPS6130303B2 (en) | 1986-07-12 |
Family
ID=15981218
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55174590A Granted JPS5798200A (en) | 1980-12-12 | 1980-12-12 | Processing system for memory access fault |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5798200A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0496846A (en) * | 1990-08-13 | 1992-03-30 | Fujitsu Ltd | Portable terminal device |
-
1980
- 1980-12-12 JP JP55174590A patent/JPS5798200A/en active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0496846A (en) * | 1990-08-13 | 1992-03-30 | Fujitsu Ltd | Portable terminal device |
Also Published As
Publication number | Publication date |
---|---|
JPS6130303B2 (en) | 1986-07-12 |
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